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公开(公告)号:US20140204006A1
公开(公告)日:2014-07-24
申请号:US14223883
申请日:2014-03-24
Applicant: SAMSUNG DISPLAY CO., LTD
Inventor: Nam-Soo Kang , Seong-Young Lee , Sung-Man Kim , Seung-Hwan Moon
IPC: G09G3/36
CPC classification number: G09G3/3614 , G02F1/136286 , G09G3/36 , G09G3/3611 , G09G3/3648 , G09G3/3655 , G09G2300/0413 , G09G2300/0426 , G09G2300/0452 , G09G2310/08 , G09G2320/0209 , G09G2320/0247
Abstract: A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
Abstract translation: 显示装置包括具有像素行和像素列的像素矩阵,并且包括具有切换元件的像素,交替元件交替地位于每个像素列的上侧和下侧附近的角落处,并且交替地位于靠近上侧和下侧的拐角处, 交替地在每个像素列的左侧和右侧的角落处; 多对栅极线传输栅极导通电压; 和多条数据线传输数据电压,其中每对栅极线设置在每个像素行的上侧和下侧,每行中的像素连接到最靠近各个开关元件的栅极线,并且每条数据线被布置 在相邻的像素列对之间并连接到成对的像素对,其中该对的一个像素具有位于最靠近相应数据线的开关元件。
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公开(公告)号:US10026371B2
公开(公告)日:2018-07-17
申请号:US15707223
申请日:2017-09-18
Applicant: Samsung Display Co., Ltd.
Inventor: Nam-Soo Kang , Seong-Young Lee , Sung-Man Kim , Seung-Hwan Moon
IPC: G09G3/36 , G02F1/1362
Abstract: A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
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公开(公告)号:US09767746B2
公开(公告)日:2017-09-19
申请号:US15332827
申请日:2016-10-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Nam-Soo Kang , Seong-Young Lee , Sung-Man Kim , Seung-Hwan Moon
IPC: G09G3/36 , G02F1/1362
CPC classification number: G09G3/3614 , G02F1/136286 , G09G3/36 , G09G3/3611 , G09G3/3648 , G09G3/3655 , G09G2300/0413 , G09G2300/0426 , G09G2300/0452 , G09G2310/08 , G09G2320/0209 , G09G2320/0247
Abstract: A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
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公开(公告)号:US10074334B2
公开(公告)日:2018-09-11
申请号:US15601026
申请日:2017-05-22
Applicant: Samsung Display Co., Ltd.
Inventor: Haeng-Won Park , Seung-Hwan Moon , Nam-Soo Kang , Sung-Jae Moon , Sung-Man Kim , Seong-Young Lee , Yong-Soon Lee
CPC classification number: G09G3/3677 , G09G2300/0426 , G11C19/184
Abstract: A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.
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公开(公告)号:US09478178B2
公开(公告)日:2016-10-25
申请号:US14223883
申请日:2014-03-24
Applicant: SAMSUNG DISPLAY CO., LTD
Inventor: Nam-Soo Kang , Seong-Young Lee , Sung-Man Kim , Seung-Hwan Moon
IPC: G09G3/36 , G02F1/1362
CPC classification number: G09G3/3614 , G02F1/136286 , G09G3/36 , G09G3/3611 , G09G3/3648 , G09G3/3655 , G09G2300/0413 , G09G2300/0426 , G09G2300/0452 , G09G2310/08 , G09G2320/0209 , G09G2320/0247
Abstract: A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
Abstract translation: 显示装置包括具有像素行和像素列的像素矩阵,并且包括具有切换元件的像素,交替元件交替地位于每个像素列的上侧和下侧附近的角落处,并且交替地位于靠近上侧和下侧的拐角处, 交替地在每个像素列的左侧和右侧的角落处; 多对栅极线传输栅极导通电压; 和多条数据线传输数据电压,其中每对栅极线设置在每个像素行的上侧和下侧,每行中的像素连接到最靠近各个开关元件的栅极线,并且每条数据线被布置 在相邻的像素列对之间并连接到成对的像素对,其中该对的一个像素具有位于最靠近相应数据线的开关元件。
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公开(公告)号:US10025149B2
公开(公告)日:2018-07-17
申请号:US15877078
申请日:2018-01-22
Applicant: SAMSUNG DISPLAY CO., LTD
Inventor: Dong-Gyu Kim , Seung-Hwan Moon , Yong-Soon Lee , Nam-Soo Kang , Haeng-Won Park
IPC: H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036 , G02F1/1345 , H01L27/12 , G02F1/1339 , H01L29/786 , G02F1/1362
CPC classification number: G02F1/13454 , G02F1/1339 , G02F1/1345 , G02F1/136286 , G02F2001/13629 , H01L27/1222 , H01L27/124 , H01L27/1255 , H01L29/78669 , H01L29/78678
Abstract: Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.
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公开(公告)号:US09874794B2
公开(公告)日:2018-01-23
申请号:US15095473
申请日:2016-04-11
Applicant: SAMSUNG DISPLAY CO., LTD
Inventor: Dong-Gyu Kim , Seung-Hwan Moon , Yong-Soon Lee , Nam-Soo Kang , Haeng-Won Park
IPC: H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036 , G02F1/1345 , G02F1/1339 , G02F1/1362 , H01L27/12 , H01L29/786
CPC classification number: G02F1/13454 , G02F1/1339 , G02F1/1345 , G02F1/136286 , G02F2001/13629 , H01L27/1222 , H01L27/124 , H01L27/1255 , H01L29/78669 , H01L29/78678
Abstract: Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.
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