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    MEMORY MODULE, OPERATING METHOD OF MEMORY MODULE, AND MEMORY SYSTEM INCLUDING MEMORY MODULE
    1.
    发明申请
    MEMORY MODULE, OPERATING METHOD OF MEMORY MODULE, AND MEMORY SYSTEM INCLUDING MEMORY MODULE 有权

    公开(公告)号：US20250087293A1

    公开(公告)日：2025-03-13

    申请号：US18883687

    申请日：2024-09-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： JINSEONG YUN ,  Daehyun KWON ,  KI-HEUNG KIM ,  JONGHOON KIM ,  Sunghak LEE ,  CHANG-YONG LEE

    IPC: G11C29/56

    Abstract: A memory module includes: a circuit board including a plurality of signal lines to which a command is applied; and a first memory device mounted on a first surface of the circuit board, connected to the plurality of signal lines, including a first mode register, and configured to: operate in a standard mode or a mirrored mode, based on a value set in the first mode register, set a value corresponding to the mirrored mode in the first mode register, based on a first command applied to the plurality of signal lines, wherein at least one bit of a plurality of command/address bits in the first command is swapped with at least one bit of a plurality of command/address bits in a second command.

    POWER MANAGEMENT INTEGRATED CIRCUITS AND SEMICONDUCTOR MEMORY MODULES INCLUDING POWER MANAGEMENT INTEGRATED CIRCUITS
    3.
    发明申请
    POWER MANAGEMENT INTEGRATED CIRCUITS AND SEMICONDUCTOR MEMORY MODULES INCLUDING POWER MANAGEMENT INTEGRATED CIRCUITS 审中-公开

    公开(公告)号：US20200335141A1

    公开(公告)日：2020-10-22

    申请号：US16731908

    申请日：2019-12-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-Geon Lee ,  KYUDONG LEE ,  JINSEONG YUN

    IPC: G11C5/14 ,  G06F1/3225 ,  G06F1/3234 ,  G11C5/04

    Abstract: A power management integrated circuit includes first pads, second pads, a third pad, and a fourth pad that are configured to be connected with an external device, a regulation block that receives first voltages from the first pads, converts the first voltages to second voltages, and outputs the second voltages to the second pads, a communication block that receives a command through the third pad and outputs an internal information request received together with the command responsive to the command, and a logic block that controls an operation of the regulation block, receives the internal information request from the communication block, and outputs internal state information to the fourth pad based on the internal information request.

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