公开(公告)号：US20180365368A1

公开(公告)日：2018-12-20

申请号：US15933958

申请日：2018-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho DO ,  Jong-hoon JUNG ,  Ji-su YU ,  Seung-young LEE ,  Tae-joong SONG ,  Jae-boong LEE

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5072 ,  H01L27/0207 ,  H01L27/11807

Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.

公开(公告)号：US20210013230A1

公开(公告)日：2021-01-14

申请号：US17034602

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho DO ,  Ji-Su YU ,  Hyeon-gyu YOU ,  Seung-Young LEE ,  Jae-boong LEE ,  Jong-hoon JUNG

IPC: H01L27/118 ,  H01L27/02

Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.

公开(公告)号：US20200159984A1

公开(公告)日：2020-05-21

申请号：US16750501

申请日：2020-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho DO ,  Jong-hoon JUNG ,  Ji-Su YU ,  Seung-young LEE ,  Tae-joong SONG ,  Jae-boong LEE

IPC: G06F30/398 ,  H01L27/118 ,  H01L27/02 ,  G06F30/392

Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.