公开(公告)号：US20230154836A1

公开(公告)日：2023-05-18

申请号：US18098158

申请日：2023-01-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Kyung Don MUN ,  Bongju CHO

IPC: H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49833 ,  H01L23/5385 ,  H01L23/3171 ,  H01L24/16 ,  H01L23/5386 ,  H01L2224/16235

Abstract: A semiconductor package includes a redistribution substrate having a dielectric layer and a wiring pattern in the dielectric layer, the wiring pattern including a line part that extends horizontally, and a via part connected to the line part, the via part having a width less than a width of the line part, a passivation layer on a top surface of the redistribution substrate, the passivation layer including a material different from a material of the dielectric layer, a conductive pillar that penetrates the passivation layer, the conductive pillar being connected to the via part, and a connection terminal on a top surface of the conductive pillar, a distance between the top surface of the conductive pillar and a top surface of the passivation layer being greater than a thickness of the passivation layer.

公开(公告)号：US20250105192A1

公开(公告)日：2025-03-27

申请号：US18635296

申请日：2024-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae Wook KIM ,  Jaeseong KIM ,  Jeongseok KIM ,  Yejin LEE ,  Jooyoung CHOI ,  Sangseok HONG

IPC: H01L23/00 ,  H01L21/762 ,  H01L23/498 ,  H01L23/522 ,  H01L25/00 ,  H01L25/18

Abstract: A semiconductor package may include a redistribution layer structure including a redistribution layer, a semiconductor chip a first surface of the redistribution layer structure, an under-bump structure disposed on a second surface of the redistribution layer structure and including a protective layer having a trench and an under-bump metal layer, an electronic element on the under-bump structure, and an underfill member filling at least a portion of a space between the under-bump structure and the electronic element and filling at least a portion of the trench, wherein, in a plan view, the trench surrounds the electronic element and may include a protrusion portion protruding outward from the electronic element in a region surrounding an edge of the electronic element.

公开(公告)号：US20250046769A1

公开(公告)日：2025-02-06

申请号：US18665893

申请日：2024-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jooyoung CHOI ,  Dahee KIM ,  Jeongseok KIM ,  Gyujin CHOI ,  Jaehoon CHOI

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16

Abstract: A semiconductor package may include a package redistribution layer including a plurality of package redistribution patterns and a package redistribution insulating layer surrounding the plurality of package redistribution patterns, a plurality of electronic components apart from each other in a horizontal direction on the package redistribution layer and including at least one sub package, a package molding layer covering a top surface of the package redistribution layer and surrounding the plurality of electronic components, and a plurality of package connection terminals attached to a bottom surface of the package redistribution layer in a fan-out manner. The at least one sub package may include a package substrate, a semiconductor chip attached to the package substrate, and a sub molding layer on the package substrate.

公开(公告)号：US20250149518A1

公开(公告)日：2025-05-08

申请号：US18744994

申请日：2024-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yejin LEE ,  Dahee KIM ,  Jaeseong KIM ,  Jeongseok KIM ,  Taewook KIM ,  Gyujin CHOI ,  Jooyoung CHOI ,  Sangseok HONG

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498

Abstract: Provided is a semiconductor package including a first redistribution layer, a semiconductor device on the first redistribution layer, a substrate protection layer below the first redistribution layer, a groove in a bottom surface of the substrate protection layer, a passive device in the groove, an underfill between the passive device and the groove, and a dam apart from the passive device, the dam protruding from the substrate protection layer and at least partially surrounding the passive device.

公开(公告)号：US20230038413A1

公开(公告)日：2023-02-09

申请号：US17702440

申请日：2022-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Jeongseok KIM ,  Bongju CHO

IPC: H01L23/34 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor package includes a first rewiring layer; a lower semiconductor chip on the first rewiring layer; an upper semiconductor chip on the lower semiconductor chip; a heat dissipation structure on the upper semiconductor chip; a molding layer on the first rewiring layer so as to contact side surfaces of the lower semiconductor chip, the upper semiconductor chip, and the heat dissipation structure; a second rewiring layer on the heat dissipation structure; and one or more connection structures on the first rewiring layer and positioned adjacent to the side surfaces of the lower semiconductor chip and the upper semiconductor chip and configured to extend through the molding layer and connect the first rewiring layer to the second rewiring layer, wherein the upper semiconductor chip and the heat dissipation structure contact each other.

公开(公告)号：US20220068784A1

公开(公告)日：2022-03-03

申请号：US17218356

申请日：2021-03-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Bongju CHO

IPC: H01L23/498 ,  H01L23/552 ,  H01L25/10

Abstract: A fan-out type semiconductor package includes: a frame including a cavity and a middle redistribution layer (RDL) structure at least partially surrounding the cavity; a semiconductor chip in the cavity; a lower RDL structure on the frame and electrically connected with the semiconductor chip and the middle RDL structure; an upper RDL structure on the frame and electrically connected with the middle RDL structure; an upper shielding pattern in the upper RDL structure to shield the semiconductor chip from electromagnetic interference (EMI); a lower shielding pattern in the lower RDL structure to shield the semiconductor chip from the EMI; and a side shielding pattern in the middle RDL structure to shield the semiconductor chip from the EMI. The upper shielding pattern and the lower shielding pattern have a thickness of no less than about 5 μm, and the side shielding pattern has a width of no less than about 5 μm.

公开(公告)号：US20210185259A1

公开(公告)日：2021-06-17

申请号：US16992330

申请日：2020-08-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seol NAMGUNG ,  Seungnam CHOI ,  Jeongseok KIM ,  Junseok KIM ,  Jongwoo BONG ,  Yunjae SUH

IPC: H04N5/378 ,  H04N5/345 ,  H04N5/3745 ,  H04N5/357 ,  G06T5/50

Abstract: An imaging device, image sensor and method are provided. A first scanning operation is performed on a pixel array in a first direction by a first selection circuit to generate first frame data by first readout circuit. A second scanning operation is performed on the pixel array in a second direction different from the first direction to generate second frame data by a second selection circuit. The first and second frame data are merged into single frame data by an image signal processor.

公开(公告)号：US20240155252A1

公开(公告)日：2024-05-09

申请号：US18417673

申请日：2024-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwon SEO ,  Jeongseok KIM ,  Hyunsurk RYU ,  Yunjae SUH ,  Chang-Woo SHIN ,  Woonhee LEE

IPC: H04N23/76 ,  G06T5/73 ,  H04N23/45 ,  H04N23/71

CPC classification number: H04N23/76 ,  G06T5/73 ,  H04N23/45 ,  H04N23/71 ,  G06T2207/10152

Abstract: Disclosed is an electronic device which includes a dynamic vision sensor that includes a first pixel sensing a change in light intensity and generates an event signal based on the sensed change in light intensity, an illuminance estimator that estimates illuminance of a light, and a time delay compensator that calculates a time delay between a first time at which the change in light intensity occurs and a second time at which the first pixel senses the change in light intensity, based on the illuminance of the light, and to compensate for the time delay.

公开(公告)号：US20230283870A1

公开(公告)日：2023-09-07

申请号：US18315771

申请日：2023-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeho BAEK ,  Jeongseok KIM ,  Jongseok SEO

IPC: H04N23/52 ,  H04N25/77

CPC classification number: H04N23/52 ,  H04N25/77

Abstract: A vision sensor includes a pixel array including a plurality of pixels, a voltage generator configured to generate a reset bias voltage provided to each of the plurality of pixels, a temperature comparing circuit configured to output a switching setting value according to a result of comparing temperature information with at least one reference temperature value, and a voltage level controller configured to generate a reset bias setting signal based on the switching setting value. The reset bias setting signal adjusts a voltage level of the reset bias voltage.

公开(公告)号：US20220191370A1

公开(公告)日：2022-06-16

申请号：US17550196

申请日：2021-12-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeho BAEK ,  Jeongseok KIM ,  Jongseok SEO

IPC: H04N5/225 ,  H04N5/3745

Abstract: A vision sensor includes a pixel array including a plurality of pixels, a voltage generator configured to generate a reset bias voltage provided to each of the plurality of pixels, a temperature comparing circuit configured to output a switching setting value according to a result of comparing temperature information with at least one reference temperature value, and a voltage level controller configured to generate a reset bias setting signal based on the switching setting value. The reset bias setting signal adjusts a voltage level of the reset bias voltage.