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公开(公告)号:US20190148211A1
公开(公告)日:2019-05-16
申请号:US15993752
申请日:2018-05-31
发明人: Ji Youn SEO , Byung Sun PARK , Sung Jin PARK , Ji Woon IM , Hyun Seok LIM , Byung Ho CHUN , Yu Seon KANG , Hyuk Ho KWON , Tae Yong EOM , Dae Hun CHOI , Dong Hyeop HA
IPC分类号: H01L21/687 , H01J37/32
摘要: A deposition apparatus for depositing a material on a wafer, the apparatus including a lower shower head; an upper shower head disposed on the lower shower head, the upper shower head facing the lower shower head; and a support structure between the upper shower head and the lower shower head, the wafer being supportable by the support structure, wherein the upper shower head includes upper holes for providing an upper gas onto the wafer, the lower shower head includes lower holes for providing a lower gas onto the wafer, the support structure includes a ring body surrounding the wafer; a plurality of ring support shafts between the ring body and the lower shower head; and a plurality of wafer supports extending inwardly from a lower region of the ring body to support the wafer, and the plurality of wafer supports are spaced apart from one another.
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公开(公告)号:US20190145001A1
公开(公告)日:2019-05-16
申请号:US15988067
申请日:2018-05-24
发明人: Byung Sun PARK , Ji Youn SEO , Ji Woon IM , Hyun Seok LIM , Byung Ho CHUN , Yu Seon KANG , Hyuk Ho KWON , Sung Jin PARK , Tae Yong EOM , Dong Hyeop HA
IPC分类号: C23C16/455 , H01J37/32 , H01L21/02
摘要: A deposition apparatus includes an upper shower head and a lower shower head within a process chamber, the upper shower head and the lower shower head facing each other, a support structure between the upper shower head and the lower shower head, the support structure being connected to the lower shower head to support a wafer, and a plasma process region between the wafer supported by the support structure and the lower shower head, wherein the lower shower head includes lower holes to jet a lower gas in a direction of the wafer, wherein the upper shower head includes upper holes to jet an upper gas in a direction of the wafer, and wherein the support structure includes through opening portions to discharge a portion of the lower gas jetted through the lower holes to a space between the support structure and the upper shower head.
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3.
公开(公告)号:US20230307371A1
公开(公告)日:2023-09-28
申请号:US17981119
申请日:2022-11-04
发明人: Ji Youn SEO , Sang Ho RHA , Tae-Jong HAN
IPC分类号: H01L23/535 , H01L27/11582 , H01L27/11573
CPC分类号: H01L23/535 , H01L27/11582 , H01L27/11573
摘要: A semiconductor memory device includes a peripheral circuit structure including a peripheral circuit substrate, a peripheral circuit element on the peripheral circuit substrate, and a wiring structure connected to the peripheral circuit element and a memory cell structure provided on the peripheral circuit structure. The memory cell structure includes a cell substrate including a cell array region, an extended region, and a through region, a mold structure including a plurality of gate electrodes sequentially provided on the cell array region and on the extended region in a step form, and a plurality of mold sacrifice films sequentially provided on the through region, a channel structure intersecting the plurality of gate electrodes on the cell array region, and a cell contact penetrating the mold structure on the extended region and configured to connect at least one of the plurality of gate electrodes and the wiring structure.
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公开(公告)号:US20200211847A1
公开(公告)日:2020-07-02
申请号:US16578245
申请日:2019-09-20
发明人: Ji Youn SEO , Ji Woon IM , Dai Hong KIM , Ik Soo KIM , Sang Ho RHA
IPC分类号: H01L21/033 , H01L21/02
摘要: A method of fabricating a semiconductor device and a semiconductor processing apparatus are provided. The method of fabricating a semiconductor device comprises preparing a semiconductor substrate having a front side and a back side, opposing each other, and forming a material layer on the semiconductor substrate. The material layer is formed on at least a portion of the back side of the semiconductor substrate while being formed on the front side of the semiconductor substrate. The material layer formed on the at least a portion of the back side of the semiconductor substrate is removed, while the material layer formed on the front side of the semiconductor substrate remains. A semiconductor process is performed to fabricate the semiconductor device using the material layer remaining on the front side of the semiconductor substrate.
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