公开(公告)号：US09768106B2

公开(公告)日：2017-09-19

申请号：US14993044

申请日：2016-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Jin Cho ,  Jong-Min Jung ,  Yun-Ji Hur ,  Sung-Sik Park ,  Keun-Bong Lee

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  G02F1/1345 ,  H01L23/14

CPC classification number: H01L23/4985 ,  G02F1/13452 ,  H01L23/145 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A chip-on-film (COF) package includes a base film, a semiconductor chip mounted on a chip mounting region of a top surface of the base film, a plurality of top inner output conductive patterns, a plurality of bottom inner output conductive patterns and a plurality of landing vias. The top inner output conductive patterns are formed on the top surface of the base film and respectively connected to chip inner output pads formed on a bottom surface of the semiconductor chip. The bottom inner output conductive patterns are formed on a bottom surface of the base film. The landing vias are formed to vertically penetrate the base film and to respectively connect the top inner output conductive patterns and the bottom inner output conductive patterns. The landing vias are arranged within the chip mounting region to form a two-dimensional shape.