公开(公告)号：US20230131543A1

公开(公告)日：2023-04-27

申请号：US17903969

申请日：2022-09-06

Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute of Science and Technology

Inventor： Jun-Woo JANG ,  Jaekang SHIN ,  Lee-Sup KIM ,  Seungkyu CHOI

IPC: G06N3/04 ,  G06V10/82

Abstract: A processor-implemented method with multi-task processing includes: obtaining weights of a first neural network; obtaining first delta weights of a second neural network that is fine-tuned from the first neural network, based on a target task; performing an operation of the second neural network on first input data, based on sums of the weights of the first neural network and the first delta weights; obtaining second delta weights of a third neural network that is fine-tuned from the first neural network, based on a change of the target task; replacing the first delta weights with the second delta weights; and performing an operation of the third neural network on second input data, based on sums of the weights of the first neural network and the second delta weights, wherein the first delta weights comprise difference values in the weights of the first neural network and weights of the second neural network, and the second delta weight comprises difference values in the weights of the first neural network and weights of the third neural network.

公开(公告)号：US20220164674A1

公开(公告)日：2022-05-26

申请号：US17523129

申请日：2021-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Woo JANG ,  Yoojin KIM ,  Channoh KIM ,  Hyun Sun PARK

IPC: G06N3/10 ,  G06F17/15

Abstract: A neural network device includes: a memory configured to store a first feature map and a second feature map; and a neural network processor configured to operate a neural network, and comprising: a fetcher configured to fetch input data from the first feature map of the memory; a buffer configured to store the input data; an operator configured to generate output data by performing a convolution operation between the input data and a kernel; a writer configured to write the output data in the second feature map of the memory; and a controller configured to control the fetcher to fetch the input data and control the writer to write the output data, according to one or more intervals and one or more offsets determined based on a dilation rate of the kernel in multiple steps.

公开(公告)号：US20230153571A1

公开(公告)日：2023-05-18

申请号：US17887216

申请日：2022-08-12

Applicant: Samsung Electronics Co., Ltd. ,  UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Jun-Woo JANG ,  Jaewoo PARK ,  Faaiz ASIM ,  Jongeun LEE

IPC: G06N3/04 ,  G06N3/063

CPC classification number: G06N3/04 ,  G06N3/063

Abstract: A quantization method of a neural network, and an apparatus for performing the quantization method are provided. The quantization method includes obtaining parameters of the neural network, quantizing the parameters using a quantization scheme in which at least one positive quantization level and at least one negative quantization level symmetric to each other by excluding zero from quantization levels, and outputting the quantized parameters.

公开(公告)号：US20220342833A1

公开(公告)日：2022-10-27

申请号：US17858506

申请日：2022-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunsun PARK ,  Jun-Woo JANG ,  Yoojin KIM ,  Channoh KIM

IPC: G06F13/16

Abstract: A data transmission method for a convolution operation, and a convolution operation apparatus including a fetcher that includes a loader, at least one sender, a buffer controller, and a reuse buffer. The method includes loading, by the loader, input data of an input feature map according to a loading order, based on input data stored in the reuse buffer, a shape of a kernel to be used for a convolution operation, and two-dimensional (2D) zero-value information of weights of the kernel; storing, by the buffer controller, the loaded input data in the reuse buffer of an address cyclically assigned according to the loading order; and selecting, by each of the at least one sender, input data corresponding to each output data of a convolution operation among the input data stored in the reuse buffer, based on one-dimensional (1D) zero-value information of the weights, and outputting the selected input data.

公开(公告)号：US20220164289A1

公开(公告)日：2022-05-26

申请号：US17317339

申请日：2021-05-11

Applicant: Samsung Electronics Co., Ltd

Inventor： Yoojin KIM ,  Channoh KIM ,  Hyun Sun PARK ,  Sehwan LEE ,  Jun-Woo JANG

IPC: G06F12/0862 ,  G06F12/0804

Abstract: A computing method and device with data sharing re provided. The method includes loading, by a loader, input data of an input feature map stored in a memory in loading units according to a loading order, storing, by a buffer controller, the loaded input data in a reuse buffer of an address rotationally allocated according to the loading order, and transmitting, by each of a plurality of senders, to an executer respective input data corresponding to each output data of respective convolution operations among the input data stored in the reuse buffer, wherein portions of the transmitted respective input data overlap other.

公开(公告)号：US20240232091A1

公开(公告)日：2024-07-11

申请号：US18618355

申请日：2024-03-27

Applicant: Samsung Electronics Co., Ltd

Inventor： Yoojin KIM ,  Channoh KIM ,  Hyun Sun PARK ,  Sehwan LEE ,  Jun-Woo JANG

IPC: G06F12/0862 ,  G06F12/0804 ,  G06F1/04 ,  G06N3/04

CPC classification number: G06F12/0862 ,  G06F12/0804 ,  G06F1/04 ,  G06F2212/1021 ,  G06N3/04

Abstract: A computing method and device with data sharing re provided. The method includes loading, by a loader, input data of an input feature map stored in a memory in loading units according to a loading order, storing, by a buffer controller, the loaded input data in a reuse buffer of an address rotationally allocated according to the loading order, and transmitting, by each of a plurality of senders, to an executer respective input data corresponding to each output data of respective convolution operations among the input data stored in the reuse buffer, wherein portions of the transmitted respective input data overlap other.

公开(公告)号：US20230325462A1

公开(公告)日：2023-10-12

申请号：US18296165

申请日：2023-04-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gopinath Vasanth MAHALE ,  Pramod Parameshwara UDUPA ,  Jun-Woo JANG ,  Kiran Kolar CHANDRASEKHARAN ,  Sehwan LEE

IPC: G06F17/14 ,  G06N3/0464 ,  G06F7/544

CPC classification number: G06F17/14 ,  G06N3/0464 ,  G06F7/5443

Abstract: A processor-implemented apparatus includes a forward transform module configured to transform input feature maps (IFMs) by performing a forward transform operation in a Winograd convolution (WinConv) domain, multiply and accumulate array (MAA) units configured to multiply the transformed IFMs by transformed kernels and perform a first inverse transform operation based on results of the multiplying, and an inverse transform module configured to generate output feature maps (OFMs) based on a result of the first inverse transform operation.

公开(公告)号：US20230130779A1

公开(公告)日：2023-04-27

申请号：US17892481

申请日：2022-08-22

Applicant: Samsung Electronics Co., Ltd ,  Korea Advanced Institute of Science and Technology

Inventor： Jun-Woo JANG ,  Jaekang SHIN ,  Lee-Sup KIM ,  Seungkyu CHOI

IPC: G06N3/08 ,  G06N3/04

Abstract: A method with neural network compression includes: generating a second neural network by fine-tuning a first neural network, which is pre-trained based on training data, for a predetermined purpose; determining delta weights corresponding to differences between weights of the first neural network and weights of the second neural network; compressing the delta weights; retraining the second neural network updated based on the compressed delta weights and the weights of the first neural network; and encoding and storing the delta weights updated by the retraining of the second neural network.

公开(公告)号：US20220253692A1

公开(公告)日：2022-08-11

申请号：US17400353

申请日：2021-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeongseok YU ,  Yoojin KIM ,  Seongwook PARK ,  Hyun Sun PARK ,  Sehwan LEE ,  Jun-Woo JANG ,  Deokjin JOO

IPC: G06N3/08 ,  G06F9/30 ,  G06F7/02

Abstract: Disclosed is a method and apparatus of operating a neural network. The neural network operation method includes receiving data for the neural network operation, verifying whether competition occurs between a first data traversal path corresponding to a first operation device and a second data traversal path corresponding to a second operation device, determining first operand data and second operand data from among the data using a result of the verifying and a priority between the first data traversal path and the second data traversal path, and performing the neural network operation based on the first operand data and the second operand data.

公开(公告)号：US20220383103A1

公开(公告)日：2022-12-01

申请号：US17499149

申请日：2021-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junki PARK ,  Joonsang YU ,  Jun-Woo JANG

IPC: G06N3/08 ,  G06N3/04 ,  G06F7/556 ,  G06F7/487 ,  H03K19/17728

Abstract: A processor-implemented hardware accelerator method includes: receiving input data; loading a lookup table (LUT); determining an address of the LUT by inputting the input data to a comparator; obtaining a value of the LUT corresponding to the input data based on the address; and determining a value of a nonlinear function corresponding to the input data based on the value of the LUT, wherein the LUT is determined based on a weight of a neural network that outputs the value of the nonlinear function.