公开(公告)号：US20240250000A1

公开(公告)日：2024-07-25

申请号：US18468317

申请日：2023-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonghyuk YIM ,  Wandon KIM ,  Hyunbae LEE ,  Hyoseok CHOI ,  Sunghwan KIM ,  Junki PARK

IPC: H01L23/48 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/495 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate including an active pattern, a source/drain pattern on the active pattern, an active contact on the source/drain pattern; a lower power line in the substrate, a lower contact that vertically connects the active contact to the lower power line, a conductive layer between the lower contact and the lower power line, and a power delivery network layer on a bottom surface of the substrate. The conductive layer may include silicon (Si) and a first element. The first element may include a transition metal or a metalloid. A concentration of the first element may decrease in a direction from the lower contact toward the lower power line.

公开(公告)号：US20220383103A1

公开(公告)日：2022-12-01

申请号：US17499149

申请日：2021-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junki PARK ,  Joonsang YU ,  Jun-Woo JANG

IPC: G06N3/08 ,  G06N3/04 ,  G06F7/556 ,  G06F7/487 ,  H03K19/17728

Abstract: A processor-implemented hardware accelerator method includes: receiving input data; loading a lookup table (LUT); determining an address of the LUT by inputting the input data to a comparator; obtaining a value of the LUT corresponding to the input data based on the address; and determining a value of a nonlinear function corresponding to the input data based on the value of the LUT, wherein the LUT is determined based on a weight of a neural network that outputs the value of the nonlinear function.

公开(公告)号：US20240128335A1

公开(公告)日：2024-04-18

申请号：US18369236

申请日：2023-09-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggun YOU ,  Junki PARK ,  Sunghwan KIM ,  Wandon KIM ,  Sughyun SUNG ,  Hyunbae LEE

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes an active region on a substrate, a plurality of channel layers spaced apart from each other, a gate structure on the substrate, a source/drain region on at least one side of the gate structure, and a contact plug connected to the source/drain region. The contact plug includes a metal-semiconductor compound layer and a barrier layer on the metal-semiconductor compound layer. The contact plug includes a first inclined surface and a second inclined surface positioned where the metal-semiconductor compound layer and the barrier layer directly contact each other. The barrier layer includes first and second ends protruding towards the gate structure. The first and second ends are positioned at a level higher than an upper surface of an uppermost channel layer. An uppermost portion of the metal-semiconductor compound layer is positioned at a level higher than an upper surface of the source/drain region.

公开(公告)号：US20230178476A1

公开(公告)日：2023-06-08

申请号：US17864716

申请日：2022-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunwoo KANG ,  Yoontae HWANG ,  Geunwoo KIM ,  Sunghwan KIM ,  Junki PARK

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76805 ,  H01L21/76831 ,  H01L23/53266

Abstract: An integrated circuit device includes a conductive region disposed on a substrate, an insulating structure including a contact hole disposed in the conductive region and extending from the conductive region in a vertical direction, a local capping pattern having an outer sidewall in contact with an upper portion of an inner wall of the contact hole and an inner sidewall facing an inside of the contact hole and having a width gradually increasing in a horizontal direction away from the substrate, and a conductive plug passing through the insulating structure through the contact hole in the vertical direction, having a lower sidewall in contact with the insulating structure and an upper sidewall in contact with the local capping pattern, and including a first metal.

公开(公告)号：US20210209190A1

公开(公告)日：2021-07-08

申请号：US17137803

申请日：2020-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeha KUNG ,  Jae-Joon KIM ,  Junki PARK

IPC: G06F17/16 ,  G06F7/523 ,  G06F1/03 ,  H03M7/42

Abstract: A matrix data processing method performed by a computing device which performs a matrix multiplication operation includes, with respect to each of one or more elements included in a matrix, when a value of each element satisfies a designated condition, determining the element to be a don't-care element and determining an output value of the don't-care element, generating a bitstream based on the output value of the don't-care element and index values of valid elements included in the matrix, and equally dividing the bitstream into pieces of a designated number, and generating a Huffman code corresponding to each of a plurality of lower bitstreams that are generated as a result of the equal division.