-
公开(公告)号:US20230229171A1
公开(公告)日:2023-07-20
申请号:US18191467
申请日:2023-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minju KIM
IPC: G05D1/02
CPC classification number: G05D1/0248
Abstract: A robot is provided. The robot includes a depth camera, a light detection and ranging (LIDAR) sensor, and at least one processor, wherein the at least one processor acquires a first depth image including first depth information by using the depth camera, acquires second depth information corresponding to a first area of the first depth image by using the LIDAR sensor, acquires a depth difference between the second depth information and the first depth information included in the first area, identifies an area to be corrected around the first area, acquires information regarding a filter for correcting the first depth information on the basis of the depth difference, and acquires a second depth image by correcting the first depth information corresponding to the area to be corrected, on the basis of the first depth information, the second depth information, and the information regarding the filter.
-
公开(公告)号:US20210102841A1
公开(公告)日:2021-04-08
申请号:US17003197
申请日:2020-08-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hoonseop KIM , Vladmir PROTOPOPOV , Minju KIM
Abstract: A semiconductor substrate processing apparatus includes a transfer chamber disposed between process chambers performing processing of a semiconductor substrate, a transfer robot disposed inside the transfer chamber to load the semiconductor substrate into the process chamber and unload the semiconductor substrate whose processing has been performed in the process chamber, an optical assembly irradiates irradiation light having multiple wavelengths onto the semiconductor substrate, the optical assembly splitting measurement light reflected from a surface of the semiconductor substrate into first and second measurement light and collecting interference light caused by first reflected light and second reflected light, a light detector detecting the interference light and converting the interference light into an electric signal to produce an interference signal, and a controller extracting spectrum information for each wavelength of the measurement light from the interference signal and calculating distribution information of a film formed on the semiconductor substrate.
-
公开(公告)号:US20220254781A1
公开(公告)日:2022-08-11
申请号:US17468139
申请日:2021-09-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: INHYUN SONG , JUNGGIL YANG , Minju KIM
IPC: H01L27/092 , H01L29/49 , H01L29/423 , H01L21/8238
Abstract: Disclosed are semiconductor devices and their fabricating methods. The semiconductor device comprises first and second active patterns, a first channel pattern including first semiconductor patterns, a second channel pattern including second semiconductor patterns, a gate electrode on the first and second channel patterns, and a gate dielectric layer between the gate electrode and the first and second channel patterns. The gate electrode includes a first inner gate electrode between the first semiconductor patterns, a second inner gate electrode between the second semiconductor patterns, and an outer gate electrode outside the first and second semiconductor patterns. The first and second inner gate electrodes are on bottom surfaces of uppermost first and second semiconductor patterns. The outer gate electrode is on top surfaces and sidewalls of the uppermost first and second semiconductor patterns. The first and second inner gate electrodes have different work functions.
-
公开(公告)号:US20220179619A1
公开(公告)日:2022-06-09
申请号:US17541930
申请日:2021-12-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungkeun CHO , Donghee SUH , Minju KIM , Jaeyung YEO
Abstract: An electronic device is disclosed, and may include a communication circuit, a memory, and a processor operatively connected to the communication circuit and the memory. The memory stores instructions that, when executed, cause the processor to recognize a second external device that will perform an operation corresponding to a first utterance received by a first external device, to establish a first session between the first external device and the second external device, to recognize a device, which will perform an operation corresponding to a second utterance received by a third external device, while maintaining the first session, to determine whether to establish a second session between the third external device and the second external device based on a specified first condition when the device that will perform the operation corresponding to the second utterance is the second external device, and to establish the second session independently of the first session or establish an integrated session between the first external device, the second external device, and the third external device by integrating the first session and the second session when establishing the second session, on a basis of a specified second condition.
-
5.
公开(公告)号:US20240339451A1
公开(公告)日:2024-10-10
申请号:US18744905
申请日:2024-06-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: INHYUN SONG , JUNGGIL YANG , Minju KIM
IPC: H01L27/092 , H01L21/28 , H01L21/8238 , H01L29/423 , H01L29/49 , H01L29/786
CPC classification number: H01L27/092 , H01L21/823821 , H01L21/823828 , H01L21/823842 , H01L21/82385 , H01L27/0924 , H01L29/42392 , H01L29/4908 , H01L21/28088 , H01L29/78696
Abstract: Disclosed are semiconductor devices and their fabricating methods. The semiconductor device comprises first and second active patterns, a first channel pattern including first semiconductor patterns, a second channel pattern including second semiconductor patterns, a gate electrode on the first and second channel patterns, and a gate dielectric layer between the gate electrode and the first and second channel patterns. The gate electrode includes a first inner gate electrode between the first semiconductor patterns, a second inner gate electrode between the second semiconductor patterns, and an outer gate electrode outside the first and second semiconductor patterns. The first and second inner gate electrodes are on bottom surfaces of uppermost first and second semiconductor patterns. The outer gate electrode is on top surfaces and sidewalls of the uppermost first and second semiconductor patterns. The first and second inner gate electrodes have different work functions.
-
公开(公告)号:US20230335552A1
公开(公告)日:2023-10-19
申请号:US18212304
申请日:2023-06-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junggil YANG , Minju KIM , Donghyi KOH
IPC: H01L27/088 , H01L29/06 , H01L29/78
CPC classification number: H01L27/0886 , H01L29/0673 , H01L29/7851
Abstract: An integrated circuit device including a substrate including first and second device regions; a first fin active region on the first device region; a second fin active region on the second device region; an isolation film covering side walls of the active regions; gate cut insulating patterns on the isolation film on the device regions; a gate line extending on the fin active regions, the gate line having a length limited by the gate cut insulating patterns; and an inter-region insulating pattern on the isolation film between the fin active regions and at least partially penetrating the gate line in a vertical direction, wherein the inter-region insulating pattern has a bottom surface proximate to the substrate, a top surface distal to the substrate, and a side wall linearly extending from the bottom to the top surface.
-
公开(公告)号:US20230245344A1
公开(公告)日:2023-08-03
申请号:US18194205
申请日:2023-03-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaesik CHANG , Minju KIM , Heungwoo HAN
CPC classification number: G06T7/73 , G06T7/50 , G06T7/68 , G06V10/82 , G06T2207/10024
Abstract: An electronic device and a control method of an electronic device are provided. The method acquiring a plurality of images through at least one camera, inputting red green blue (RGB) data for each of the plurality of images into a first neural network model to obtain two-dimensional pose information on an object included in the plurality of images, inputting RGB data for at least one image of the plurality of images into a second neural network model to identify whether the object is transparent, if the object is a transparent object, performing stereo matching based on the two-dimensional pose information on each of the plurality of images to obtain three-dimensional pose information on the object, and if the object is an opaque object, acquiring three-dimensional pose information on the object based on one image of the plurality of images and depth information corresponding to the one image.
-
公开(公告)号:US20220173097A1
公开(公告)日:2022-06-02
申请号:US17372896
申请日:2021-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junggil YANG , Minju KIM , Donghyi KOH
IPC: H01L27/088 , H01L29/78 , H01L29/06
Abstract: An integrated circuit device including a substrate including first and second device regions; a first fin active region on the first device region; a second fin active region on the second device region; an isolation film covering side walls of the active regions; gate cut insulating patterns on the isolation film on the device regions; a gate line extending on the fin active regions, the gate line having a length limited by the gate cut insulating patterns; and an inter-region insulating pattern on the isolation film between the fin active regions and at least partially penetrating the gate line in a vertical direction, wherein the inter-region insulating pattern has a bottom surface proximate to the substrate, a top surface distal to the substrate, and a side wall linearly extending from the bottom to the top surface.
-
公开(公告)号:US20240339450A1
公开(公告)日:2024-10-10
申请号:US18746928
申请日:2024-06-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junggil YANG , Minju KIM , Donghyi KOH
IPC: H01L27/088 , H01L29/06 , H01L29/78
CPC classification number: H01L27/0886 , H01L29/0673 , H01L29/7851
Abstract: An integrated circuit device including a substrate including first and second device regions; a first fin active region on the first device region; a second fin active region on the second device region; an isolation film covering side walls of the active regions; gate cut insulating patterns on the isolation film on the device regions; a gate line extending on the fin active regions, the gate line having a length limited by the gate cut insulating patterns; and an inter-region insulating pattern on the isolation film between the fin active regions and at least partially penetrating the gate line in a vertical direction, wherein the inter-region insulating pattern has a bottom surface proximate to the substrate, a top surface distal to the substrate, and a side wall linearly extending from the bottom to the top surface.
-
-
-
-
-
-
-
-