Abstract:
An electronic device includes at least one voice receiver provided at at least one area different from each other in the electronic device to receive voices of a plurality of utterers; a storage configured to store the received voices of the plurality of utterers; an information acquirer configured to acquire utterer information on the plurality of utterers; and a controller configured to store the received voices in the storage to match to the plurality of utterers and utterance locations of the plurality of utterers using directivities of the received voices.
Abstract:
A resistive memory device has a structure in which a source, a channel layer, a drain, and a resistive memory layer are sequentially formed in a particular direction, with a gate electrode formed around the channel layer. The source, channel layer, and drain may be vertically stacked on a substrate, and the gate electrode may be formed completely around the channel layer.
Abstract:
A resistive switching device includes a first material layer between a first electrode and a second electrode. The first material layer has a first region and a second region parallel to the first region. The first region corresponds to a conducting path formed in the first material layer, and is configured to switch from a low-resistance state to a high-resistance state in response to an applied voltage that is greater than or equal to a first voltage. The second region is configured to switch to a first resistance value that is less than a resistance value of the first region in the high-resistance state when the applied voltage is greater than or equal to a second voltage. The first region remains constant or substantially constant when the second region has the first resistance value.
Abstract:
A memory device may include a first electrode and a second electrode spaced apart from the first electrode. The memory device may further include a memory element disposed between the first electrode and the second electrode and a switching element disposed between the first electrode and the second electrode. The switching element may be configured to control signal access to the memory element. The memory device may further include a barrier layer disposed between the memory element and the switching element, the barrier layer including an insulation material.