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公开(公告)号:US20180175001A1
公开(公告)日:2018-06-21
申请号:US15837187
申请日:2017-12-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungeun PYO , Jongbo SHIM , Ji Hwang KIM , Chajea JO , Sang-Uk HAN
IPC: H01L25/065 , H01L23/00 , H01L23/538 , H01L21/48 , H01L25/00
CPC classification number: H01L25/0652 , H01L21/481 , H01L21/4853 , H01L21/4857 , H01L23/5381 , H01L23/5383 , H01L23/5385 , H01L23/5386 , H01L24/16 , H01L25/0655 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/16145 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2224/1703 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2225/06565 , H01L2924/15311
Abstract: A semiconductor package including a first substrate including first upper pads, the first upper pads on a top surface of the first substrate, a second substrate including second upper pads, the second upper pads on a top surface of the second substrate, a pitch of the second upper pads being less than a pitch of the first upper pads, and a first semiconductor chip on and electrically connected to both (i) at least one of the first upper pads and (ii) at least one of the second upper pads may be provided.
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公开(公告)号:US20190259733A1
公开(公告)日:2019-08-22
申请号:US16404066
申请日:2019-05-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungeun PYO , Jongbo SHIM , Ji Hwang KIM , Chajea JO , Sang-Uk HAN
IPC: H01L25/065 , H01L23/538 , H01L25/00 , H01L21/48 , H01L23/00
Abstract: A semiconductor package including a first substrate including first upper pads, the first upper pads on a top surface of the first substrate, a second substrate including second upper pads, the second upper pads on a top surface of the second substrate, a pitch of the second upper pads being less than a pitch of the first upper pads, and a first semiconductor chip on and electrically connected to both (i) at least one of the first upper pads and (ii) at least one of the second upper pads may be provided.
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