DISPLAY POWER REDUCTION USING HISTOGRAM METADATA
    2.
    发明申请
    DISPLAY POWER REDUCTION USING HISTOGRAM METADATA 审中-公开
    使用HISTOGRAM METADATA显示功率降低

    公开(公告)号:US20150029394A1

    公开(公告)日:2015-01-29

    申请号:US14332132

    申请日:2014-07-15

    Abstract: A method includes identifying an optimal backlight value for at least one quality level of a first video segment. The method also includes transmitting data for the first video segment. The transmitted data for the first video segment includes a message containing a first set of display adaptation information. The first set of display adaptation information includes the optimal backlight value for the at least one quality level of the first video segment. The method further includes identifying a backlight value for the at least one quality level of a second video segment. The method also includes determining a maximum backlight value change threshold between successive video segments. In addition, the method includes applying temporal smoothing between the optimal backlight value and the backlight value based on the maximum backlight value change threshold.

    Abstract translation: 一种方法包括为第一视频段的至少一个质量水平识别最佳背光值。 该方法还包括发送用于第一视频段的数据。 第一视频段的发送数据包括包含第一组显示适配信息的消息。 第一组显示适配信息包括用于第一视频段的至少一个质量水平的最佳背光值。 该方法还包括识别用于第二视频段的至少一个质量水平的背光值。 该方法还包括确定连续视频段之间的最大背光值改变阈值。 此外,该方法包括基于最大背光值改变阈值在最佳背光值和背光值之间应用时间平滑。

    DYNAMIC VOLTAGE/FREQUENCY SCALING FOR VIDEO PROCESSING USING EMBEDDED COMPLEXITY METRICS
    3.
    发明申请
    DYNAMIC VOLTAGE/FREQUENCY SCALING FOR VIDEO PROCESSING USING EMBEDDED COMPLEXITY METRICS 有权
    使用嵌入式复杂度量表进行视频处理的动态电压/频率范围

    公开(公告)号:US20140376618A1

    公开(公告)日:2014-12-25

    申请号:US14091238

    申请日:2013-11-26

    Abstract: A video decoder performs a method of dynamic voltage/frequency scaling (DVFS) for video processing. The method includes parsing a bitstream associated with a video to determine embedded information associated with a complexity of a first portion of the video, estimating the complexity of the first portion of the video using the embedded information, determining a voltage and frequency to be used for decoding the first portion of the video based on the estimated complexity, and decoding the first portion of the video at the determined voltage and frequency.

    Abstract translation: 视频解码器执行用于视频处理的动态电压/频率缩放(DVFS)的方法。 该方法包括解析与视频相关联的比特流以确定与视频的第一部分的复杂性相关联的嵌入信息,使用嵌入信息估计视频的第一部分的复杂度,确定要用于的视频的电压和频率 基于所估计的复杂度对视频的第一部分进行解码,并以所确定的电压和频率对视频的第一部分进行解码。

    LAYOUT CORRECTION METHOD AND MASK MANUFACTURING METHOD USING THE SAME

    公开(公告)号:US20240362395A1

    公开(公告)日:2024-10-31

    申请号:US18394330

    申请日:2023-12-22

    CPC classification number: G06F30/398 G03F1/36

    Abstract: A layout correction method for a semiconductor device includes receiving a design layout including at least a target layer and a reference layer, detecting target edges including target patterns in the target layer, and detecting reference edges including reference patterns in the reference layer, determining a dissection point in a section intersecting a space between reference patterns on a target edge having three or more intersecting reference edges, generating segments by dissecting the target edges based on dissection points set for the target edges, setting an evaluation point at an intermediate point of a section intersecting a reference pattern in a segment intersecting the reference pattern, among the segments, determining a movement amount of segments having evaluation points set on the segments by inputting a feature measured at the evaluation points to a layout correction model, and generating a corrected layout by moving the segments based on the movement amount.

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