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1.发明授权公开(公告)号：US12044961B2
公开(公告)日：2024-07-23
申请号：US17188140
申请日：2021-03-01
发明人： Pilsoo Kang , Wonchan Lee , Sangwook Kim , Sungyong Moon , Seunghune Yang , Jeeeun Jung
IPC分类号： G03F1/70 , G03F1/24 , G03F1/36 , H01L21/033
CPC分类号： G03F1/70 , G03F1/24 , H01L21/0334 , G03F1/36
摘要： A mask forming method includes providing preliminary mask data including a Manhattan path such as a quadrangle, a bar, a polygon or a combination thereof based on a layout. Mask data including a curvilinear shape is prepared by correcting the preliminary mask data through application of an elliptical function, a B-spline curve, or a combination thereof. A mask pattern is formed on a mask substrate based on the mask data.
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2.发明授权公开(公告)号：US11604971B2
公开(公告)日：2023-03-14
申请号：US16414257
申请日：2019-05-16
发明人： Jaechul Park , Sangwook Kim
IPC分类号： G06N3/063 , H01L25/065 , G11C13/00
摘要： A neuromorphic apparatus includes a three-dimensionally-stacked synaptic structure, and includes a plurality of unit synaptic modules, each of the plurality of unit synaptic modules including a plurality of synaptic layers, each of the plurality of synaptic layers including a plurality of stacked layers, and each of the plurality of unit synaptic modules further including a first decoder interposed between two among the plurality of synaptic layers. The neuromorphic apparatus further includes a second decoder that provides a level selection signal to the first decoder included in one among the plurality of unit synaptic modules to be accessed, and a third decoder that generates an address of one among a plurality of memristers to be accessed in a memrister array of one among the plurality of synaptic layers included in the one among the plurality of unit synaptic modules to be accessed.
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公开(公告)号：US11556160B2
公开(公告)日：2023-01-17
申请号：US16769302
申请日：2018-11-30
发明人： Kunsuk Kim , Jehwan Lee , Sangwook Kim
摘要： Disclosed in various embodiments of the present invention are an electronic device for adjusting a voltage and an operating method therefor. The electronic device comprises: at least one first converter for supporting a plurality of operating modes for changing voltage; a second converter supporting the plurality of operating modes and connected with the at least one first converter in series; and at least one processor, wherein the processor can be configured to determine an intermediate voltage between the at least one first converter and the second converter on the basis of an input voltage of the at least one first converter and an output voltage of the second converter, and control an operating mode of each of the at least one first converter and the second converter on the basis of the determined intermediate voltage. Other embodiments are also possible.
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公开(公告)号：US11527646B2
公开(公告)日：2022-12-13
申请号：US17026665
申请日：2020-09-21
发明人： Jinseong Heo , Sangwook Kim , Yunseong Lee , Sanghyun Jo
摘要： A domain switching device includes a channel region, a source region and a drain region connected to the channel region, a gate electrode isolated from contact with the channel region, an anti-ferroelectric layer between the channel region and the gate electrode, a conductive layer between the gate electrode and the anti-ferroelectric layer to contact the anti-ferroelectric layer, and a barrier layer between the anti-ferroelectric layer and the channel region.
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公开(公告)号：US11417763B2
公开(公告)日：2022-08-16
申请号：US16682512
申请日：2019-11-13
发明人： Sangwook Kim , Yunseong Lee , Sanghyun Jo , Jinseong Heo
IPC分类号： H01L29/78 , H01L27/088 , H01L29/51 , H01L21/8234 , H01L21/28 , H01L29/66
摘要： An integrated circuit includes transistors respectively including channel layers in a substrate, source electrodes and drain electrodes respectively contacting both sides of the channel layers, gate electrodes on the channel layers, and ferroelectrics layers between the channel layers and the gate electrodes. Electrical characteristics of the ferroelectrics layers of at least two of the transistors are different. Accordingly, threshold voltages of the transistors are different from each other.
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6.发明授权公开(公告)号：US11989646B2
公开(公告)日：2024-05-21
申请号：US18166859
申请日：2023-02-09
发明人： Jaechul Park , Sangwook Kim
IPC分类号： G06N3/063 , G11C13/00 , H01L25/065
CPC分类号： G06N3/063 , G11C13/0023 , G11C13/003 , H01L25/0657
摘要： A neuromorphic apparatus includes a three-dimensionally-stacked synaptic structure, and includes a plurality of unit synaptic modules, each of the plurality of unit synaptic modules including a plurality of synaptic layers, each of the plurality of synaptic layers including a plurality of stacked layers, and each of the plurality of unit synaptic modules further including a first decoder interposed between two among the plurality of synaptic layers. The neuromorphic apparatus further includes a second decoder that provides a level selection signal to the first decoder included in one among the plurality of unit synaptic modules to be accessed, and a third decoder that generates an address of one among a plurality of memristers to be accessed in a memrister array of one among the plurality of synaptic layers included in the one among the plurality of unit synaptic modules to be accessed.
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公开(公告)号：US11824117B2
公开(公告)日：2023-11-21
申请号：US17308543
申请日：2021-05-05
发明人： Kwanghee Lee , Sangwook Kim , Jinseong Heo
CPC分类号： H01L29/78391 , H01L29/516 , H01L29/6684
摘要： An oxide semiconductor transistor includes: an insulating substrate including a trench; a gate electrode in the trench; an oxide semiconductor layer on a surface of the insulating substrate, the surface exposed through the trench; and a ferroelectric layer between the gate electrode and the oxide semiconductor layer, wherein the oxide semiconductor layer may include a source region and a drain region which are on the insulating substrate outside the trench and are apart from each other with the gate electrode therebetween.
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公开(公告)号：US11646375B2
公开(公告)日：2023-05-09
申请号：US17112355
申请日：2020-12-04
发明人： Yunseong Lee , Jinseong Heo , Sangwook Kim , Taehwan Moon , Sanghyun Jo
IPC分类号： H01L29/78 , H01L27/1159 , H01L29/51 , H01L21/02
CPC分类号： H01L29/78391 , H01L29/516 , H10B51/30 , H01L21/02181 , H01L21/02189
摘要： Provided is a ferroelectric thin-film structure including a semiconductor substrate, a first ferroelectric layer on the semiconductor substrate, and a second ferroelectric layer on the semiconductor substrate. The second ferroelectric layer is spaced apart from the first ferroelectric layer and has a different dielectric constant from the first ferroelectric layer. The first ferroelectric layer and the second ferroelectric layer may be different from each other in terms of the amount of a dopant contained therein, and may exhibit different threshold voltages when applied to transistors.
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公开(公告)号：US11522082B2
公开(公告)日：2022-12-06
申请号：US17001979
申请日：2020-08-25
发明人： Jinseong Heo , Sangwook Kim , Yunseong Lee , Sanghyun Jo , Hyangsook Lee
摘要： Provided are an electronic device and a method of manufacturing the same. The electronic device includes a ferroelectric crystallization layer between a substrate and a gate electrode and a crystallization prevention layer between the substrate and the ferroelectric crystallization layer. The ferroelectric crystallization layer is at least partially crystallized and includes a dielectric material having ferroelectricity or anti-ferroelectricity. Also, the crystallization prevention layer prevents crystallization in the ferroelectric crystallization layer from being spread toward the substrate.
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公开(公告)号：US11349026B2
公开(公告)日：2022-05-31
申请号：US16682380
申请日：2019-11-13
发明人： Yunseong Lee , Jinseong Heo , Sangwook Kim , Sanghyun Jo
IPC分类号： H01L29/78 , H01L29/51 , H01L29/423 , H01L21/02 , H01L29/66 , H01L29/08 , H01L27/1159
摘要： An electronic device includes a ferroelectric layer arranged on a channel region and a gate electrode arranged on the ferroelectric layer. The ferroelectric layer includes a plurality of first oxide monolayers and a second oxide monolayers that is arranged between the substrate and the gate electrode and include a material different from a material of the first oxide monolayers. The first oxide monolayers include oxide monolayers that are alternately formed and include materials different from one another.
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