公开(公告)号：US20210257264A1

公开(公告)日：2021-08-19

申请号：US17246778

申请日：2021-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGMIN YOO ,  JUYOUN KIM ,  HYUNGJOO NA ,  BONGSEOK SUH ,  JOOHO JUNG ,  EUICHUL HWANG ,  SUNGMOON LEE

IPC: H01L21/8238 ,  H01L27/118 ,  H01L21/762

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an active pattern, a gate electrode extending in a first direction and crossing the active pattern which extends in a second direction, a separation structure crossing the active pattern and extending in the first direction, a first gate dielectric pattern disposed on a side surface of the gate electrode, a second gate dielectric pattern disposed on a side surface of the separation structure, and a gate capping pattern covering a top surface of the gate electrode. A level of a top surface of the separation structure is higher than a level of a top surface of the gate capping pattern.

公开(公告)号：US20240204068A1

公开(公告)日：2024-06-20

申请号：US18224864

申请日：2023-07-21

Applicant: Samsung electronics Co., Ltd.

Inventor： HYUNGJOO NA ,  WOO BIN SONG ,  JIN-WOOK YANG ,  Cheoljin YUN ,  YOSHINAO HARADA

IPC: H01L29/417 ,  H01L23/48 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41775 ,  H01L23/481 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/495 ,  H01L29/4975 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of semiconductor patterns that are spaced apart from each other and are vertically stacked, a source/drain pattern connected to the plurality of semiconductor patterns, a through pattern penetrating the source/drain pattern, a metal-semiconductor compound layer between the source/drain pattern and the through pattern, a gate electrode on the plurality of semiconductor patterns, the gate electrode including inner electrodes between adjacent semiconductor patterns of the plurality of semiconductor patterns and an outer electrode on an uppermost semiconductor pattern of the plurality of semiconductor patterns, an active contact on the through pattern, and a first metal layer on the active contact, the first metal layer including a power wiring and first wirings connected to the active contact.

公开(公告)号：US20230253264A1

公开(公告)日：2023-08-10

申请号：US18300983

申请日：2023-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGMIN YOO ,  JUYOUN KIM ,  HYUNGJOO NA ,  BONGSEOK SUH ,  JOOHO JUNG ,  EUICHUL HWANG ,  SUNGMOON LEE

IPC: H01L21/8238 ,  H01L27/118 ,  H01L21/762

CPC classification number: H01L21/823878 ,  H01L27/11807 ,  H01L21/76224 ,  H01L2027/11861 ,  H01L2027/11829 ,  H01L2027/11816

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including an active pattern, a gate electrode extending in a first direction and crossing the active pattern which extends in a second direction, a separation structure crossing the active pattern and extending in the first direction, a first gate dielectric pattern disposed on a side surface of the gate electrode, a second gate dielectric pattern disposed on a side surface of the separation structure, and a gate capping pattern covering a top surface of the gate electrode. A level of a top surface of the separation structure is higher than a level of a top surface of the gate capping pattern.