公开(公告)号：US20040085321A1

公开(公告)日：2004-05-06

申请号：US10694482

申请日：2003-10-27

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka ,  Akio Ohba ,  Masayoshi Tanaka

IPC: G06T001/00 ,  G06F015/00 ,  G09G005/36

CPC classification number: G06T15/005 ,  A63F2300/203

Abstract: The present invention relates to the architecture and use of a computer system optimized for the efficient modeling of graphics. The computer system has a primary processor and a graphics processor. The primary processor has two vector processor units within it, one which is closely connected to central processor unit. Simultaneously performing complex modeling calculations on the first vector processor and CPU, and geometry transformation calculations on the second vector processor, allows for efficient modeling of graphics. Furthermore, the graphics processor is optimized to rapidly switch between data flows from the two vector processors. In addition, the graphics processor is able to render many pixels simultaneously, and has a local memory on the graphics processor chip that acts as a frame buffer, texture buffer, and z buffer. This allows a high fill rate to the frame buffer.

Abstract translation: 本发明涉及针对图形的有效建模而优化的计算机系统的架构和用途。 计算机系统具有主处理器和图形处理器。 主处理器内有两个矢量处理器单元，一个与中央处理器单元紧密连接。 同时对第一个矢量处理器和CPU执行复杂建模计算，并在第二个矢量处理器上进行几何变换计算，可以对图形进行有效的建模。 此外，图形处理器被优化以在来自两个向量处理器的数据流之间快速切换。 此外，图形处理器能够同时渲染许多像素，并且在图形处理器芯片上具有作为帧缓冲器，纹理缓冲器和z缓冲器的本地存储器。 这允许帧缓冲器的高填充率。

公开(公告)号：US20030189569A1

公开(公告)日：2003-10-09

申请号：US10406530

申请日：2003-04-03

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka

IPC: G06T015/20

CPC classification number: G06T3/00 ,  G06T15/20

Abstract: Methods and apparatus for perspective transforming a plurality of objects in a three-dimensional space into a two-dimensional space, each object having a plurality of vertexes, the methods and apparatus determining whether the plurality of vertexes for each of the objects are localized within the three-dimensional space; performing a first perspective transformation process on the respective plurality of vertexes of the objects when the plurality of vertexes for each of the objects are not localized within the three-dimensional space; and performing a second perspective transformation process on the respective plurality of vertexes of the objects when the plurality of vertexes for each of the objects are localized within the three-dimensional space, wherein the second perspective transformation process requires less calculating power than the first perspective transformation process.

Abstract translation: 用于将三维空间中的多个对象透视变换为二维空间的方法和装置，每个对象具有多个顶点，所述方法和装置确定每个对象的多个顶点是否位于 三维空间; 当每个对象的多个顶点没有被定位在三维空间内时，对对象的相应多个顶点执行第一透视变换处理; 以及当所述对象的所述多个顶点被定位在所述三维空间内时，对所述对象的所述多个顶点执行第二透视变换处理，其中所述第二透视变换处理需要比所述第一透视变换更少的计算能力 处理。

公开(公告)号：US20040150646A1

公开(公告)日：2004-08-05

申请号：US10739960

申请日：2003-12-17

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka

IPC: G06F015/16 ,  G09G005/00

CPC classification number: G06T15/005 ,  G06T1/60 ,  G06T2210/36

Abstract: An image processing apparatus includes an auxiliary storage device 19 stored first data of a given object image higher in LOD level, a main memory 11 stored second data of the given object image lower in the LOD level than the first data, a CPU 10, and a GPU 18. The CPU 10 calculates an apparent speed of the object image on a screen, and determines data to be used in the geometry processing of the object image to one of the first data and the second data in accordance with the apparent speed. The GPU 18 takes in the first data (or the second data) from the auxiliary storage device 19 (or the main memory 11) to conduct the rendering process in the case where the geometry processing is conducted by using the first data (or the second data).

Abstract translation: 图像处理装置包括存储LOD电平较高的给定对象图像的第一数据的辅助存储装置19，存储LOD级别比第一数据低的给定对象图像的第二数据的主存储器11，CPU 10，以及 GPU10。CPU10计算屏幕上的对象图像的表观速度，并且根据表观速度将目标图像的几何处理中使用的数据确定为第一数据和第二数据之一。 在通过使用第一数据（或第二数据）进行几何处理的情况下，GPU 18从辅助存储装置19（或主存储器11）接收第一数据（或第二数据），以进行渲染处理 数据）。

公开(公告)号：US20040205759A1

公开(公告)日：2004-10-14

申请号：US10804790

申请日：2004-03-19

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka

IPC: G06F015/16

CPC classification number: G06F9/5077 ,  G06F9/5072

Abstract: The objective is to facilitate leasing of excess computing resources of a processor when computing resources of other processors are deficient, thereby making distributed computing more efficient. A computing resource of a processor is clustered into sub processors, and the operating status of each of the sub processors is monitored by a management processor, so that a task is assigned to a sub processor that is operated according to the magnitude of the load of information processing requested. When a request for resource leasing is made from another computer via I/O interface, a computing resource of a idle sub processor is leased.

Abstract translation: 目的是在计算其他处理器的资源不足时促进处理器的多余计算资源的租用，从而使分布式计算更有效率。 处理器的计算资源被集群到子处理器中，并且每个子处理器的操作状态由管理处理器监视，使得任务被分配给子处理器，该子处理器根据负载的大小来操作 信息处理请求。 当通过I / O接口从另一计算机进行资源租赁请求时，租用空闲子处理器的计算资源。

公开(公告)号：US20030125111A1

公开(公告)日：2003-07-03

申请号：US10263033

申请日：2002-10-02

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka

IPC: A63F009/24 ,  G06F019/00

CPC classification number: G06T13/60 ,  G06T13/20

Abstract: At a site on a moving object image, one or more units, i.e., image components combinable with or separable from the image, are placed. The motion of each unit is determined by a geometry processor along with the motion of object images. The geometry processor sequentially writes, in a unit management table, coordinates of central points and vertices of each unit, the velocity of the central points, textures and color. A unit controller reads the location and velocity of each unit from the unit management table, calculates the distance and relative velocity between the units, and combines the units with or separates the units from each other according to the distance and relative velocity. The unit controller then writes the coordinates of the units in the unit management table. A rendering processor draws an object image including the units according to the information written in the unit management table.

Abstract translation: 在移动物体图像上的位置，放置一个或多个单元，即与图像组合或可与图像分离的图像分量。 每个单元的运动由几何处理器以及对象图像的运动决定。 几何处理器在单元管理表中顺序地写入每个单元的中心点和顶点的坐标，中心点的速度，纹理和颜色。 单元控制器从单元管理表读取每个单元的位置和速度，计算单元之间的距离和相对速度，并根据距离和相对速度将单元与单元相互组合或分离。 单元控制器然后将单元的坐标写入单元管理表。 渲染处理器根据写入单元管理表中的信息来绘制包括单元的对象图像。

公开(公告)号：US20030085895A1

公开(公告)日：2003-05-08

申请号：US10317888

申请日：2002-12-12

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka

IPC: G06T015/60

CPC classification number: G06T15/04 ,  A63F13/10 ,  A63F13/52 ,  A63F2300/66 ,  A63F2300/663 ,  G06T15/10 ,  G06T15/506

Abstract: A system performs refraction mapping for an image having an object, the object being viewed along at least one line of sight and at least partially through a boundary of first and second at least semi-transparent media. The boundary defines at least one normal vector at one or more intersections of the line of sight and the boundary. The system includes: a perspective transformation unit operable to project a three-dimensional version of the object on a two-dimensional texture plane using a perspective view transformation algorithm to obtain texture addresses of the object, the texture plane being perpendicular to the line of sight and the transformation being performed without regard to refraction; and a refraction determination unit operable to obtain at least one refraction vector for at least one of the texture addresses, a given refraction vector being a function of a component of the at least one normal vector that is parallel to the texture plane.

公开(公告)号：US20030080417A1

公开(公告)日：2003-05-01

申请号：US10262789

申请日：2002-10-02

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka

IPC: H01L023/48

CPC classification number: H01L25/165 ,  H01L23/525 ,  H01L25/105 ,  H01L25/18 ,  H01L2225/1005 ,  H01L2924/0002 ,  H05K1/181 ,  H05K2201/09409 ,  H05K2201/09418 ,  H05K2201/09709 ,  H05K2201/10159 ,  H05K2201/10689 ,  Y02P70/611 ,  H01L2924/00

Abstract: An electronic device is provided on which semiconductor packages can be mounted efficiently. The electronic device includes a board that can receive a plurality of first semiconductor packages each carrying a processor device and a plurality of second semiconductor packages each carrying a memory device. Mount regions where the packages are to be mounted and non-mount regions are alternately arranged in rows and columns on the board. This ensures approximately equal wiring distances between the packages, allowing processor devices to access associated memory devices at the same time.

Abstract translation: 提供了可以有效地安装半导体封装的电子设备。 电子设备包括可以接收多个第一半导体封装的板，每个第一半导体封装均带有处理器设备和多个第二半导体封装，每个第二半导体封装均携带存储器件 要安装封装的安装区域和非安装区域交替排列在板上的行和列中。 这确保了封装之间的大致相等的布线距离，允许处理器设备同时访问相关的存储器件。