公开(公告)号：US20080136397A1

公开(公告)日：2008-06-12

申请号：US11636425

申请日：2006-12-08

申请人： Stephen H. Gunther ,  Edward Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Mike Cornaby

发明人： Stephen H. Gunther ,  Edward Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Mike Cornaby

IPC分类号： G05F5/00

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： Methods and apparatus to operate various logic blocks of an integrated circuit (IC) at independent voltages are described. In one embodiment, supply of power to one or more domains in an IC is adjusted based on an indication that power consumption by components of the corresponding domain is to be modified. Other embodiments are also described.

摘要翻译： 描述以独立电压操作集成电路（IC）的各种逻辑块的方法和装置。 在一个实施例中，基于对相应域的组件的功率消耗进行修改的指示来调整对IC中的一个或多个域的功率供给。 还描述了其它实施例。

公开(公告)号：US08397090B2

公开(公告)日：2013-03-12

申请号：US11636425

申请日：2006-12-08

申请人： Stephen H. Gunther ,  Edward Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Mike Cornaby

发明人： Stephen H. Gunther ,  Edward Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Mike Cornaby

IPC分类号： G06F1/26 ,  G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： Methods and apparatus to operate various logic blocks of an integrated circuit (IC) at independent voltages are described. In one embodiment, supply of power to one or more domains in an IC is adjusted based on an indication that power consumption by components of the corresponding domain is to be modified. Other embodiments are also described.

摘要翻译： 描述以独立电压操作集成电路（IC）的各种逻辑块的方法和装置。 在一个实施例中，基于对相应域的组件的功率消耗进行修改的指示来调整对IC中的一个或多个域的功率供给。 还描述了其它实施例。

公开(公告)号：US20070262879A1

公开(公告)日：2007-11-15

申请号：US11432869

申请日：2006-05-12

申请人： Robert Greiner ,  Edward Burton ,  Anant Deval ,  Doug Huard

发明人： Robert Greiner ,  Edward Burton ,  Anant Deval ,  Doug Huard

IPC分类号： G08C19/16

CPC分类号： H04L12/66

摘要： An input/output bus for analog sensors in an integrated circuit is described. In one example, a plurality of analog sensors generate an analog output in response to a respective event on the integrated circuit. A plurality of digitizers each coupled to an analog sensor generate a digital representation of the analog output of the respective sensor, and a communications bus coupled to the plurality of digitizers communicates the digital representations to an external device.

摘要翻译： 描述了集成电路中用于模拟传感器的输入/输出总线。 在一个示例中，多个模拟传感器响应于集成电路上的相应事件而产生模拟输出。 每个耦合到模拟传感器的多个数字转换器产生相应传感器的模拟输出的数字表示，并且耦合到多个数字化仪的通信总线将数字表示传送到外部设备。

公开(公告)号：US20070262759A1

公开(公告)日：2007-11-15

申请号：US11434308

申请日：2006-05-12

申请人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Douglas Huard

发明人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Douglas Huard

IPC分类号： G05F1/00

CPC分类号： H02M3/1584

摘要： While firing a number of phases of a multi-phase switching voltage regulator in a sequence, a determination is made as to which one of the phases has the lowest phase current. Then, the next phase, to be fired in the sequence, is selected as the one that has been determined to have the lowest phase current. Other embodiments are also described and claimed.

摘要翻译： 在按顺序触发多相开关电压调节器的多个相位的同时，确定哪一相具有最低的相电流。 然后，选择要在序列中触发的下一个阶段，作为已被确定为具有最低相位电流的阶段。 还描述和要求保护其他实施例。

公开(公告)号：US07466176B2

公开(公告)日：2008-12-16

申请号：US11432868

申请日：2006-05-12

申请人： Doug Huard ,  Robert Greiner ,  Anant Deval ,  Edward Burton

发明人： Doug Huard ,  Robert Greiner ,  Anant Deval ,  Edward Burton

IPC分类号： H03K3/017

CPC分类号： H02M3/157 ,  H02M3/1584

摘要： A voltage regulator is described for microelectronic devices using dual edge pulse width modulated control signal. In one example a first digital duty cycle value is received from a voltage controller and a pulse width modulated waveform is generated in response to the first duty cycle value, the waveform comprising a plurality of pulses with a modulated width. The waveform is applied to a voltage generator to generate a supply of power at a voltage determined by the duty cycle of the waveform. A second digital duty cycle value is received from the controller, and the leading edge of a subsequent pulse of the waveform is advanced if the second digital duty cycle value is greater than the first digital duty cycle. The trailing edge of the subsequent pulse of the waveform is advanced if the second digital duty cycle value is less than the first digital duty cycle value.

摘要翻译： 对使用双边缘脉冲宽度调制控制信号的微电子器件描述了电压调节器。 在一个示例中，从电压控制器接收第一数字占空比值，并且响应于第一占空比值产生脉宽调制波形，该波形包括具有调制宽度的多个脉冲。 波形被施加到电压发生器以在由波形的占空比确定的电压下产生电力供应。 从控制器接收第二数字占空比值，如果第二数字占空比值大于第一数字占空比，则波形的后续脉冲的前沿被提前。 如果第二数字占空比值小于第一数字占空比值，则波形的后续脉冲的后沿被提前。

公开(公告)号：US20070266262A1

公开(公告)日：2007-11-15

申请号：US11431739

申请日：2006-05-09

申请人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Doug Huard ,  David Perchlik

发明人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Doug Huard ,  David Perchlik

IPC分类号： G06F1/00

CPC分类号： G06F1/28 ,  Y10T307/511

摘要： A method and apparatus for current detection for microelectronic devices using source-switched sensors. An embodiment of a current detector for a microelectronic device includes a first voltage sensor and a second voltage sensor. The first voltage sensor is to measure a first voltage of the microelectronic device during a first time period and a second voltage of the microelectronic device during a second time period. The second voltage sensor is to measure the second voltage during the first time period and the first voltage during the second time period. A voltage value is equal to the sum of the first voltage measured by the first sensor plus the first voltage measured by the second sensor, minus the sum of the second voltage measured by the first sensor plus the second voltage measured by the second sensor. Other embodiments are also described and claimed.

摘要翻译： 一种使用光源开关传感器的微电子器件的电流检测方法和装置。 用于微电子器件的电流检测器的实施例包括第一电压传感器和第二电压传感器。 第一电压传感器是在第一时间段期间测量微电子器件的第一电压以及在第二时间段期间测量微电子器件的第二电压。 第二电压传感器是在第一时间段期间测量第二电压和在第二时间段期间测量第一电压。 电压值等于由第一传感器加上由第二传感器测量的第一电压的第一电压与由第一传感器测量的第二电压加第二传感器测量的第二电压之和的总和。 还描述和要求保护其他实施例。

公开(公告)号：US20070257649A1

公开(公告)日：2007-11-08

申请号：US11430788

申请日：2006-05-08

申请人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Douglas Huard

发明人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Douglas Huard

IPC分类号： G05F1/00

CPC分类号： H02M3/156 ,  H02M2001/0022

摘要： A method and an apparatus to regulate voltage supply have been disclosed. In one embodiment, the apparatus includes a power converter block to generate an output voltage from an input voltage and a voltage regulator controller coupled to the power converter block to input at least one time-modulated signal to the power converter block, the at least one time-modulated signal having a duty cycle, the voltage regulator controller including a counter having an increment value substantially proportional to the input voltage, wherein the counter is used to adjust the duty cycle of the at least one time-modulated signal. Other embodiments have been claimed and described.

摘要翻译： 已经公开了一种用于调节电压供应的方法和装置。 在一个实施例中，该装置包括功率转换器块，用于从输入电压产生输出电压，耦合到功率转换器模块的电压调节器控制器将至少一个时间调制信号输入到功率转换器模块，该至少一个 具有占空比的时间调制信号，所述电压调节器控制器包括具有与所述输入电压基本成比例的增量值的计数器，其中所述计数器用于调整所述至少一个时间调制信号的占空比。 已经要求和描述了其它实施例。

公开(公告)号：US20090276642A1

公开(公告)日：2009-11-05

申请号：US12502023

申请日：2009-07-13

申请人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Doug Huard

发明人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Doug Huard

IPC分类号： G06F1/00 ,  H02J1/00

CPC分类号： H02M3/1584 ,  H02M2001/0032 ,  Y02B70/16

摘要： A system is disclosed. The system includes a central processing unit (CPU) to operate in one or more low power sleep states, and a power converter. The power converter includes phase inductors; and one or more power switches to drive the phase inductors. The one or more power switches are deactivated during the CPU sleep state.

摘要翻译： 公开了一种系统。 该系统包括在一个或多个低功率睡眠状态下操作的中央处理单元（CPU）和功率转换器。 功率转换器包括相电感; 以及用于驱动相电感器的一个或多个电源开关。 在CPU休眠状态期间，一个或多个电源开关被禁用。

公开(公告)号：US20070262645A1

公开(公告)日：2007-11-15

申请号：US11434423

申请日：2006-05-12

申请人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Doug Huard ,  Stephen Gunther

发明人： Edward Burton ,  Robert Greiner ,  Anant Deval ,  Doug Huard ,  Stephen Gunther

IPC分类号： H02J1/00

CPC分类号： H02J7/0065 ,  H02M1/36 ,  Y10T307/445

摘要： For one disclosed embodiment, modulation circuitry may control power conversion circuitry to supply power for one or more load circuits. Voltage regulation control circuitry may control the modulation circuitry to regulate voltage supply from the power conversion circuitry. Current surge balance control circuitry may separately control the modulation circuitry to provide supply current steps by the power conversion circuitry to help cancel load current surges. Other embodiments are also disclosed.

摘要翻译： 对于一个公开的实施例，调制电路可以控制功率转换电路为一个或多个负载电路供电。 电压调节控制电路可以控制调制电路来调节来自功率转换电路的电压供应。 电流浪涌平衡控制电路可以单独地控制调制电路以通过功率转换电路提供电源电流步骤以帮助消除负载电流浪涌。 还公开了其他实施例。

公开(公告)号：US20070262802A1

公开(公告)日：2007-11-15

申请号：US11432868

申请日：2006-05-12

申请人： Doug Huard ,  Robert Greiner ,  Anant Deval ,  Edward Burton

发明人： Doug Huard ,  Robert Greiner ,  Anant Deval ,  Edward Burton

IPC分类号： H03K3/017

CPC分类号： H02M3/157 ,  H02M3/1584

摘要： A voltage regulator is described for microelectronic devices using dual edge pulse width modulated control signal. In one example a first digital duty cycle value is received from a voltage controller and a pulse width modulated waveform is generated in response to the first duty cycle value, the waveform comprising a plurality of pulses with a modulated width. The waveform is applied to a voltage generator to generate a supply of power at a voltage determined by the duty cycle of the waveform. A second digital duty cycle value is received from the controller, and the leading edge of a subsequent pulse of the waveform is advanced if the second digital duty cycle value is greater than the first digital duty cycle. The trailing edge of the subsequent pulse of the waveform is advanced if the second digital duty cycle value is less than the first digital duty cycle value

摘要翻译： 对使用双边缘脉冲宽度调制控制信号的微电子器件描述了电压调节器。 在一个示例中，从电压控制器接收第一数字占空比值，并且响应于第一占空比值产生脉宽调制波形，该波形包括具有调制宽度的多个脉冲。 波形被施加到电压发生器以在由波形的占空比确定的电压下产生电力供应。 从控制器接收第二数字占空比值，并且如果第二数字占空比值大于第一数字占空比，则波形的后续脉冲的前沿被提前。 如果第二数字占空比值小于第一数字占空比值，则波形的后续脉冲的后沿被提前