公开(公告)号：US20240178756A1

公开(公告)日：2024-05-30

申请号：US18059947

申请日：2022-11-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mustapha EL-MARKHI ,  Avadhut JUNNARKAR ,  Sigfredo GONZALEZ DIAZ

IPC: H02M3/158 ,  H02M1/08

CPC classification number: H02M3/158 ,  H02M1/08

Abstract: A dual loop clamp circuit includes a clamp circuit and a low-side driver circuit. The clamp circuit includes a clamp enable output and a low-side clamp output. The low-side driver circuit includes a low-side control signal input and an output stage. The output stage includes a low-side drive output and an input. The low-side drive output is coupled to the low-side clamp output. The input of the output stage is coupled to the clamp enable output and the low-side control signal input.

公开(公告)号：US20240213874A1

公开(公告)日：2024-06-27

申请号：US18146512

申请日：2022-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Avadhut JUNNARKAR ,  Mustapha EL-MARKHI ,  Neeraj KESKAR

IPC: H02M1/00 ,  H02M1/08 ,  H02M3/155 ,  H03K3/012 ,  H03K3/037 ,  H03K19/0175

CPC classification number: H02M1/0054 ,  H02M1/08 ,  H02M3/155 ,  H03K3/012 ,  H03K3/037 ,  H03K19/017509 ,  H03K17/162

Abstract: A gate driver circuit includes a pull-up circuit, a pull-down circuit, a level shifter circuit, and a drive strength control circuit. The pull-up circuit includes a pull-up output, a first signal input, and a first enable input. The pull-up output is coupled to a gate drive output. The first signal input is coupled to a drive signal input. The pull-down circuit includes a pull-down output, a second signal input, and a second enable input. The pull-down output is coupled to the gate drive output. The second signal input is coupled to the drive signal input. The level shifter circuit includes a shifter output and a drive strength input. The shifter output is coupled to the first enable input and the second enable input. The drive strength control circuit includes a drive strength output coupled to the drive strength input.

公开(公告)号：US20240178824A1

公开(公告)日：2024-05-30

申请号：US18059832

申请日：2022-11-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Taisuke KAZAMA ,  Mustapha EL-MARKHI ,  Avadhut JUNNARKAR

IPC: H03K5/08 ,  H01L29/866 ,  H02M3/155 ,  H03K17/687

CPC classification number: H03K5/084 ,  H01L29/866 ,  H02M3/155 ,  H03K17/687

Abstract: An adaptive clamp circuit includes a clamp circuit and a clamp control circuit. The clamp circuit includes a first transistor, a second transistor, and a variable resistor. The first transistor includes a first current terminal, a second current terminal, and a control terminal. The first current terminal is coupled to a switching terminal. The second current terminal is coupled to a ground terminal. The second transistor includes a first current terminal, a second current terminal, and a control terminal. The first current terminal of the second transistor is coupled to the control terminal of the first transistor. The second current terminal of the second transistor is coupled to the switching terminal. The variable resistor is coupled between the control terminal of the second transistor and the ground terminal. The clamp control circuit is coupled between the switching terminal and the variable resistor.

公开(公告)号：US20250088093A1

公开(公告)日：2025-03-13

申请号：US18496327

申请日：2023-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Avadhut JUNNARKAR ,  Mustapha El-Markhi ,  Vikram MANI

IPC: H02M1/34 ,  H02M1/00 ,  H02M3/158

Abstract: A circuit includes: an output terminal; a first transistor; and a clamp circuit. The first transistor has a first terminal, a second terminal, and a control terminal. The second terminal of the first transistor coupled to the output terminal. The clamp circuit has a second transistor and a clamp controller. The second transistor has a first terminal, a second terminal, and a control terminal. The clamp controller has a first terminal, a second terminal, and a third terminal. The first terminal of the second transistor is coupled to the control terminal of the first transistor. The third terminal of the clamp controller is coupled to the control terminal of the second transistor. The clamp controller includes a capacitor having a first terminal and a second terminal. The first terminal of the capacitor is coupled to the third terminal of the clamp controller.