Package with stacked power stage and integrated control die

    公开(公告)号:US11158567B2

    公开(公告)日:2021-10-26

    申请号:US16537517

    申请日:2019-08-09

    Abstract: A package includes a semiconductor die forming a power field effect transistor (FET), a control die, and a first leadframe. The control die is arranged on a first surface of the first leadframe, and the semiconductor die is arranged on an opposing second surface of the first leadframe. The package further includes a second leadframe including a first surface and a second surface opposing the first surface, wherein the semiconductor die is arranged on the first surface of the second leadframe to facilitate heat transfer therethrough. The package also includes mold compound at least partially covering the semiconductor die, the control die, the first leadframe and the second leadframe with the second surface of the second leadframe exposed.

    PACKAGE WITH STACKED POWER STAGE AND INTEGRATED CONTROL DIE

    公开(公告)号:US20210043551A1

    公开(公告)日:2021-02-11

    申请号:US16537517

    申请日:2019-08-09

    Abstract: A package includes a semiconductor die forming a power field effect transistor (FET), a control die, and a first leadframe. The control die is arranged on a first surface of the first leadframe, and the semiconductor die is arranged on an opposing second surface of the first leadframe. The package further includes a second leadframe including a first surface and a second surface opposing the first surface, wherein the semiconductor die is arranged on the first surface of the second leadframe to facilitate heat transfer therethrough. The package also includes mold compound at least partially covering the semiconductor die, the control die, the first leadframe and the second leadframe with the second surface of the second leadframe exposed.

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