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公开(公告)号:US11876056B2
公开(公告)日:2024-01-16
申请号:US17246561
申请日:2021-04-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jonathan Andrew Montoya , Salvatore Franks Pavone
IPC: H01L23/00
CPC classification number: H01L23/564 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0346 , H01L2224/0391 , H01L2224/0401 , H01L2224/05024 , H01L2224/13026 , H01L2924/05042 , H01L2924/07025
Abstract: In some examples, a semiconductor package includes a semiconductor die; a passivation layer abutting a device side of the semiconductor die; a first conductive layer abutting the device side of the semiconductor die; a second conductive layer abutting the first conductive layer and the passivation layer; a silicon nitride layer abutting the second conductive layer, the silicon nitride layer having a thickness ranging from 300 Angstroms to 3000 Angstroms; and a third conductive layer coupled to the second conductive layer at a gap in the silicon nitride layer, the third conductive layer configured to receive a solder ball.
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公开(公告)号:US11362020B2
公开(公告)日:2022-06-14
申请号:US17098930
申请日:2020-11-16
Applicant: Texas Instruments Incorporated
Inventor: Christopher Daniel Manack , Jonathan Andrew Montoya , Jovenic Romero Esquejo , Salvatore Frank Pavone
IPC: H01L23/495 , H01L23/498 , H01L23/00 , H01L21/50 , H01L21/768 , H01L23/31 , H01L21/60
Abstract: A semiconductor package includes an IC having circuitry configured for at least one function with some nodes connected to bond pads, with first metal posts on the bond pads, and dome support metal posts configured in a ring having a top rim defining an inner cavity with solder on the top rim and extending over an area of the inner cavity for providing a solder dome that covers the inner cavity to provide a covered air cavity over a portion of the circuitry. A leadframe includes a plurality of leads or lead terminals. The IC is flipchip attached with a solder connection to the leadframe so that the first metal posts are attached to the leads or the lead terminals. A mold compound provides encapsulation for the semiconductor package except on at least a bottom side of the leads or lead terminals.
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公开(公告)号:US20220157698A1
公开(公告)日:2022-05-19
申请号:US17098930
申请日:2020-11-16
Applicant: Texas Instruments Incorporated
Inventor: Christopher Daniel Manack , Jonathan Andrew Montoya , Jovenic Romero Esquejo , Salvatore Frank Pavone
IPC: H01L23/495 , H01L23/498 , H01L23/00 , H01L23/31 , H01L21/50 , H01L21/768
Abstract: A semiconductor package includes an IC having circuitry configured for at least one function with some nodes connected to bond pads, with first metal posts on the bond pads, and dome support metal posts configured in a ring having a top rim defining an inner cavity with solder on the top rim and extending over an area of the inner cavity for providing a solder dome that covers the inner cavity to provide a covered air cavity over a portion of the circuitry. A leadframe includes a plurality of leads or lead terminals. The IC is flipchip attached with a solder connection to the leadframe so that the first metal posts are attached to the leads or the lead terminals. A mold compound provides encapsulation for the semiconductor package except on at least a bottom side of the leads or lead terminals.
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公开(公告)号:US11855024B2
公开(公告)日:2023-12-26
申请号:US17463047
申请日:2021-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Qiao Chen , Vivek Swaminathan Sridharan , Christopher Daniel Manack , Patrick Francis Thompson , Jonathan Andrew Montoya , Salvatore Frank Pavone
IPC: H01L23/00
CPC classification number: H01L24/09 , H01L24/25 , H01L24/73 , H01L24/81 , H01L2224/09181 , H01L2224/2541 , H01L2224/73209 , H01L2224/81801
Abstract: In some examples a wafer chip scale package (WCSP) includes a semiconductor die having a device side in which a circuit is formed, and a redistribution layer (RDL) coupled to the device side that is positioned within an insulating member. In addition, the WCSP includes a scribe seal circumscribing the circuit along the device side, wherein the RDL abuts the scribe seal. Further, the WCSP includes a conductive member coupled to the RDL. The conductive member is configured to receive a solder member, and the insulating member does not extend along the device side of the semiconductor die between the conductive member and a portion of an outer perimeter of the WCSP closest to the conductive member.
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公开(公告)号:US20220415762A1
公开(公告)日:2022-12-29
申请号:US17359635
申请日:2021-06-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Christopher Daniel Manack , Jonathan Andrew Montoya , Steven Alfred Kummerl , Salvatore Frank Pavone
IPC: H01L23/495 , H01L23/498 , H01L23/31 , H01L23/60 , H01L21/56
Abstract: A semiconductor package includes a semiconductor die including terminals, a plurality of leads, at least some of the leads being electrically coupled to the terminals within the semiconductor package, a sensor on a surface of the semiconductor die, laser shielding forming a perimeter around the sensor on the surface of the semiconductor die, and a mold compound surrounding the semiconductor die except for an area inside the perimeter on the surface of the semiconductor die such that the sensor is exposed to an external environment.
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