公开(公告)号：US20210167767A1

公开(公告)日：2021-06-03

申请号：US17173981

申请日：2021-02-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H03K17/08 ,  H03K17/10 ,  H02H3/00 ,  H03K3/012

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US11356087B2

公开(公告)日：2022-06-07

申请号：US17173981

申请日：2021-02-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/08 ,  H03K17/082 ,  H03K17/10 ,  H02H3/00 ,  H03K3/012 ,  H03K17/687

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US20150137619A1

公开(公告)日：2015-05-21

申请号：US14542962

申请日：2014-11-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H02H3/00 ,  H03K3/012

CPC classification number: H03K17/0822 ,  H02H3/00 ,  H03K3/012 ,  H03K17/08 ,  H03K17/102 ,  H03K2017/0806 ,  H03K2017/6875 ,  Y10T307/766

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

Abstract translation: 在所述示例中，第一晶体管具有：漏极，其耦合到耗尽型晶体管的源极; 耦合到第一电压节点的源极; 以及耦合到控制节点的门。 第二晶体管具有：漏极，其耦合到耗尽型晶体管的栅极; 耦合到所述第一电压节点的源极; 以及通过至少一个第一逻辑设备耦合到输入节点的门。 第三晶体管具有：漏极，其耦合到耗尽型晶体管的栅极; 耦合到第二电压节点的源极; 以及通过至少一个第二逻辑设备耦合到输入节点的门。

公开(公告)号：US10177685B2

公开(公告)日：2019-01-08

申请号：US15258242

申请日：2016-09-07

Applicant: Texas Instruments Incorporated

Inventor： Bin Gu ,  Michael Douglas Seeman

IPC: H02M7/797 ,  H02M1/15

Abstract: Disclosed examples include switching power converters, control methods and ripple filter circuits in which first and second switches are connected in series across first and second DC bus nodes, with an inductor connected to a switching node joining the first and second switches and a storage capacitor between the inductor and the second DC bus node. A control circuit operates the switches to alternately transfer ripple energy from a DC bus capacitor of the DC bus circuit through the inductor to the storage capacitor, and then to transfer ripple energy from the storage capacitor through the inductor to the DC bus capacitor to regulate the ripple voltage of the DC bus circuit, and the control circuit provides hysteretic control of the absolute value of the inductor current between a first value and a higher second value during transfer of ripple energy between the DC bus capacitor and the storage capacitor.

公开(公告)号：US20180006640A1

公开(公告)日：2018-01-04

申请号：US15702493

申请日：2017-09-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H03K3/012 ,  H03K17/10 ,  H03K17/08 ,  H02H3/00 ,  H03K17/687

CPC classification number: H03K17/0822 ,  H02H3/00 ,  H03K3/012 ,  H03K17/08 ,  H03K17/102 ,  H03K2017/0806 ,  H03K2017/6875 ,  Y10T307/766

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US09762230B2

公开(公告)日：2017-09-12

申请号：US14542962

申请日：2014-11-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Douglas Seeman ,  Sandeep R. Bahl ,  David I. Anderson

IPC: H03K17/082 ,  H03K17/08 ,  H02H3/00 ,  H03K3/012

CPC classification number: H03K17/0822 ,  H02H3/00 ,  H03K3/012 ,  H03K17/08 ,  H03K17/102 ,  H03K2017/0806 ,  H03K2017/6875 ,  Y10T307/766

Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.

公开(公告)号：US20170077837A1

公开(公告)日：2017-03-16

申请号：US15258242

申请日：2016-09-07

Applicant: Texas Instruments Incorporated

Inventor： Bin Gu ,  Michael Douglas Seeman

IPC: H02M7/797 ,  H03H11/04 ,  H02M1/15

CPC classification number: H02M7/797 ,  H02M1/15

Abstract: Disclosed examples include switching power converters, control methods and ripple filter circuits in which first and second switches are connected in series across first and second DC bus nodes, with an inductor connected to a switching node joining the first and second switches and a storage capacitor between the inductor and the second DC bus node. A control circuit operates the switches to alternately transfer ripple energy from a DC bus capacitor of the DC bus circuit through the inductor to the storage capacitor, and then to transfer ripple energy from the storage capacitor through the inductor to the DC bus capacitor to regulate the ripple voltage of the DC bus circuit, and the control circuit provides hysteretic control of the absolute value of the inductor current between a first value and a higher second value during transfer of ripple energy between the DC bus capacitor and the storage capacitor.

Abstract translation: 公开的示例包括开关功率转换器，控制方法和波纹滤波器电路，其中第一和第二开关串联连接在第一和第二DC总线节点上，电感器连接到连接第一和第二开关的开关节点和存储电容器之间的存储电容器 电感器和第二DC总线节点。 控制电路操作开关以将纹波能量从DC总线电路的直流总线电容器通过电感器交替传输到存储电容器，然后将纹波能量从存储电容器通过电感器传输到直流总线电容器，以调节 DC总线电路的纹波电压，并且控制电路在DC总线电容器和存储电容器之间的纹波能量传递期间提供电感器电流在第一值和较高第二值之间的绝对值的滞后控制。