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公开(公告)号：US11356087B2
公开(公告)日：2022-06-07
申请号：US17173981
申请日：2021-02-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Michael Douglas Seeman , Sandeep R. Bahl , David I. Anderson
IPC: H03K17/08 , H03K17/082 , H03K17/10 , H02H3/00 , H03K3/012 , H03K17/687
Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
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公开(公告)号：US11088534B2
公开(公告)日：2021-08-10
申请号：US16293255
申请日：2019-03-05
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl
Abstract: Disclosed examples include methods, integrated circuits and switch circuits including a driver circuit and a silicon transistor or other current source circuit coupled with a gallium nitride or other high electron mobility first transistor, where the driver operatives in a first mode to deliver a control voltage signal to the first transistor, and in a second mode in response to a detected overvoltage condition associated with the first transistor to control the current source circuit to conduct a sink current from the first transistor to affect a control voltage to at least partially turn on the first transistor.
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公开(公告)号：US10270239B2
公开(公告)日：2019-04-23
申请号：US15182696
申请日：2016-06-15
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl
Abstract: Disclosed examples include methods, integrated circuits and switch circuits including a driver circuit and a silicon transistor or other current source circuit coupled with a gallium nitride or other high electron mobility first transistor, where the driver operatives in a first mode to deliver a control voltage signal to the first transistor, and in a second mode in response to a detected overvoltage condition associated with the first transistor to control the current source circuit to conduct a sink current from the first transistor to affect a control voltage to at least partially turn on the first transistor.
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公开(公告)号：US10094863B2
公开(公告)日：2018-10-09
申请号：US15058444
申请日：2016-03-02
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl , Grant L. Smith , Daniel Ruiz Flores
Abstract: Disclosed examples include systems to determine an on-state impedance of a high voltage transistor, and measurement circuits to measure the drain voltage of a drain terminal of the high voltage transistor during switching, including an attenuator circuit to generate an attenuator output signal representing a voltage across the high voltage transistor when the high voltage transistor is turned on, and a differential amplifier to provide an amplified sense voltage signal according to the attenuator output signal. The attenuator circuit includes a clamp transistor coupled with the drain terminal of the high voltage transistor to provide a sense signal to a first internal node, a resistive voltage divider circuit to provide the attenuator output signal based on the sense signal, and a first clamp circuit to limit the sense signal voltage when the high voltage transistor is turned off.
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公开(公告)号：US20150137619A1
公开(公告)日：2015-05-21
申请号：US14542962
申请日：2014-11-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Michael Douglas Seeman , Sandeep R. Bahl , David I. Anderson
IPC: H03K17/082 , H02H3/00 , H03K3/012
CPC classification number: H03K17/0822 , H02H3/00 , H03K3/012 , H03K17/08 , H03K17/102 , H03K2017/0806 , H03K2017/6875 , Y10T307/766
Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
Abstract translation: 在所述示例中，第一晶体管具有：漏极，其耦合到耗尽型晶体管的源极; 耦合到第一电压节点的源极; 以及耦合到控制节点的门。 第二晶体管具有：漏极，其耦合到耗尽型晶体管的栅极; 耦合到所述第一电压节点的源极; 以及通过至少一个第一逻辑设备耦合到输入节点的门。 第三晶体管具有：漏极，其耦合到耗尽型晶体管的栅极; 耦合到第二电压节点的源极; 以及通过至少一个第二逻辑设备耦合到输入节点的门。
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Patent Agency Ranking
公开(公告)号：US20190199084A1
公开(公告)日：2019-06-27
申请号：US16293255
申请日：2019-03-05
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl
CPC classification number: H02H7/1213 , H02H1/0007 , H02H9/04 , H02M1/08 , H02M1/32 , H03K17/0822 , Y02B70/1483
Abstract: Disclosed examples include methods, integrated circuits and switch circuits including a driver circuit and a silicon transistor or other current source circuit coupled with a gallium nitride or other high electron mobility first transistor, where the driver operatives in a first mode to deliver a control voltage signal to the first transistor, and in a second mode in response to a detected overvoltage condition associated with the first transistor to control the current source circuit to conduct a sink current from the first transistor to affect a control voltage to at least partially turn on the first transistor.
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公开(公告)号：US09991225B2
公开(公告)日：2018-06-05
申请号：US14747169
申请日：2015-06-23
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl , Michael D. Seeman
IPC: H01L29/66 , H01L23/00 , H01L27/085 , H01L29/78 , H01L29/40 , H01L29/778 , H01L21/8258 , H01L27/088 , H01L29/20
CPC classification number: H01L24/97 , H01L21/8258 , H01L24/48 , H01L27/085 , H01L27/088 , H01L29/2003 , H01L29/404 , H01L29/7786 , H01L29/78 , H01L2224/48137 , H01L2924/00014 , H01L2224/45099 , H01L2224/85399 , H01L2224/05599
Abstract: A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LVT) to high-voltage environments. The HVT structure includes a drain node, a source node, a control gate, and a field electrode. The drain node and the source node define a conductive channel, in which mobilized charges are regulated by the control gate. While being isolated from the control gate, the field electrode is configured to spread the mobilized charges in response to a field voltage. The field electrode is structured and routed to prevent charge sharing with any one of the drain node, source node, or control gate. Advantageously, the isolated field electrode minimizes the capacitance of the control gate as well as the drain and source nodes, such that the HVT can switch with less power loss and a more robust performance in a high-voltage environment.
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公开(公告)号：US20160380089A1
公开(公告)日：2016-12-29
申请号：US14747169
申请日：2015-06-23
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl , Michael D. Seeman
IPC: H01L29/778 , H01L23/00 , H01L29/40 , H01L29/205 , H01L27/085 , H01L29/78
CPC classification number: H01L24/97 , H01L21/8258 , H01L24/48 , H01L27/085 , H01L27/088 , H01L29/2003 , H01L29/404 , H01L29/7786 , H01L29/78 , H01L2224/48137 , H01L2924/00014 , H01L2224/45099 , H01L2224/85399 , H01L2224/05599
Abstract: A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LVT) to high-voltage environments. The HVT structure includes a drain node, a source node, a control gate, and a field electrode. The drain node and the source node define a conductive channel, in which mobilized charges are regulated by the control gate. While being isolated from the control gate, the field electrode is configured to spread the mobilized charges in response to a field voltage. The field electrode is structured and routed to prevent charge sharing with any one of the drain node, source node, or control gate. Advantageously, the isolated field electrode minimizes the capacitance of the control gate as well as the drain and source nodes, such that the HVT can switch with less power loss and a more robust performance in a high-voltage environment.
Abstract translation: 高压晶体管（HVT）结构使低压晶体管（LVT）适应于高压环境。 HVT结构包括漏极节点，源节点，控制栅极和场电极。 漏极节点和源极节点定义了导电通道，其中动员的电荷由控制栅极调节。 当与控制栅极隔离时，场电极被配置为响应于场电压来扩展动员的电荷。 场电极被构造和布线以防止与漏极节点，源极节点或控制栅极中的任何一个的电荷共享。 有利地，隔离场电极使控制栅极以及漏极和源极节点的电容最小化，使得HVT可以在较高电压环境中以更少的功率损耗和更稳定的性能来切换。
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公开(公告)号：US20250107131A1
公开(公告)日：2025-03-27
申请号：US18472329
申请日：2023-09-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep R. Bahl , Ujwal Radhakrishna , Chang Soo Suh
IPC: H01L29/778 , H01L29/08 , H01L29/20 , H01L29/66
Abstract: The present disclosure generally relates to a conductive layer in a gate structure of a semiconductor device. The conductive layer may be a silicon layer. An example is a semiconductor device. The semiconductor device includes a channel layer, a barrier layer, a gate layer, and a silicon layer. The channel layer is over a semiconductor substrate. The barrier layer is over the channel layer. The gate layer is over the barrier layer. The silicon layer is over and contacts the gate layer.
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公开(公告)号：US10340252B2
公开(公告)日：2019-07-02
申请号：US15947227
申请日：2018-04-06
Applicant: Texas Instruments Incorporated
Inventor： Sandeep R. Bahl , Michael D. Seeman
IPC: H01L29/66 , H01L23/00 , H01L27/085 , H01L29/40 , H01L29/778 , H01L21/8258 , H01L27/088 , H01L25/065 , H01L29/78 , H01L29/20
Abstract: A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LUT) to high-voltage environments. The HVT structure includes a drain node, a source node, a control gate, and a field electrode. The drain node and the source node define a conductive channel, in which mobilized charges are regulated by the control gate. While being isolated from the control gate, the field electrode is configured to spread the mobilized charges in response to a field voltage. The field electrode is structured and routed to prevent charge sharing with any one of the drain node, source node, or control gate. Advantageously, the isolated field electrode minimizes the capacitance of the control gate as well as the drain and source nodes, such that the HVT can switch with less power loss and a more robust performance in a high-voltage environment.
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