公开(公告)号：US20180340961A1

公开(公告)日：2018-11-29

申请号：US15989126

申请日：2018-05-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Arun ADONI ,  Suvadip BANERJEE ,  Sreeram Subramanyam NASUM ,  Prajkta VYAVAHARE

IPC: G01R1/067 ,  G01R31/28

CPC classification number: G01R1/06766 ,  G01R31/2834 ,  G01R35/00

Abstract: A system includes a controller for automated test equipment (ATE) contactor to interface with a device under test (DUT) including a power converter having a primary and secondary side, each side has an input/output (I/O) pin. The controller causes the ATE contactor to apply a load current on the secondary side of the power converter at a first value and vary the load current to a second value. The contactor receives first and second indications, at the first and second load currents, of a voltage on the primary side I/O pin, a voltage on the primary side of the power converter, an input current on the primary side of the power converter, a voltage on the secondary side I/O pin, and a voltage on the secondary side of the power converter. The controller determines a primary and secondary side ATE contactor resistances based on the first and second indications.

公开(公告)号：US20230378624A1

公开(公告)日：2023-11-23

申请号：US17750659

申请日：2022-05-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreeram Subramanyam NASUM ,  Kashyap Barot

IPC: H01P1/36 ,  H04B1/69 ,  H04B1/16

CPC classification number: H01P1/36 ,  H04B1/69 ,  H04B1/16

Abstract: A device includes a transformer having primary windings and secondary windings, and a transmit circuit coupled to the primary windings. The transmit circuit is configured to receive an input signal, and provide a carrier signal to the primary windings responsive to the input signal. The device also includes a receive circuit coupled to the secondary windings. The receive circuit is configured to receive the carrier signal from the secondary windings, and provide an output signal responsive to the carrier signal. The receive circuit includes a variable capacitor coupled in parallel to the secondary windings, and a spread spectrum modulation circuit configured to modulate a capacitance of the variable capacitor.

公开(公告)号：US20200119689A1

公开(公告)日：2020-04-16

申请号：US16223545

申请日：2018-12-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tarunvir SINGH ,  Kumar Anurag SHRIVASTAVA ,  Somshubhra PAUL ,  Sreeram Subramanyam NASUM

IPC: H03B5/12 ,  H03F3/45

Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

公开(公告)号：US20220107909A1

公开(公告)日：2022-04-07

申请号：US17244370

申请日：2021-04-29

Applicant: Texas Instruments Incorporated

Inventor： Suvadip BANERJEE ,  Sreeram Subramanyam NASUM ,  Anant Shankar KAMATH

IPC: G06F13/20 ,  H03K17/687 ,  G06F13/40

Abstract: A communication interface buffer comprises: a data bus connection adapted to be coupled to a bus interface contact; and a ground. The communication interface buffer also comprises an output transistor with a first current terminal, a second current terminal and a control terminal, the first current terminal coupled to the data bus connection, the second current terminal coupled to ground, and the control terminal adapted to receive a drive signal. The communication interface buffer also comprises a control circuit coupled to the control terminal of the output transistor, wherein the control circuit is configured to: turn off the output transistor during a first interval that starts when the data bus connection is coupled to the bus interface contact; and turn on the output transistor after the first interval is complete.

公开(公告)号：US20200382057A1

公开(公告)日：2020-12-03

申请号：US16998526

申请日：2020-08-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tarunvir SINGH ,  Kumar Anurag SHRIVASTAVA ,  Somshubhra PAUL ,  Sreeram Subramanyam NASUM

IPC: H03B5/12 ,  H03F3/45

Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

公开(公告)号：US20200333815A1

公开(公告)日：2020-10-22

申请号：US16727586

申请日：2019-12-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Niranjan SHANKAR ,  Sreeram Subramanyam NASUM

IPC: G05F1/56

Abstract: A low-dropout voltage system comprising a current supply (320) with a transistor circuitry (MP1˜MP5, MN1˜MN5), a mode switch capacitor (340), and a decoupling capacitor (350), wherein the mode switch capacitor (340) facilitates the low-drop voltage system to swiftly transition from a low mode with a minimal to no transient current output to a high mode with a transient current of about 6 mA by dynamically biasing the transistor circuitry (MP3˜MP5, MN1˜MN5) while limiting a voltage or current draw from an external power source.

公开(公告)号：US20200279602A1

公开(公告)日：2020-09-03

申请号：US16793447

申请日：2020-02-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreeram Subramanyam NASUM ,  Niranjan SHANKAR ,  Kumar Anurag SHRIVASTAVA ,  Kashyap BAROT

IPC: G11C11/406 ,  G11C11/409 ,  G11C7/22 ,  G11C7/10

Abstract: An encoding and transmitting system for a digital isolator system includes a transmitter for transmitting combined edge indicator signals through an isolation barrier, an encoder for generating the combined edge indicator signals based on first and second signals, a refresh clock generator for generating a refresh clock signal based on the first signal, and a refresh edge generator for masking at least a portion of the refresh clock signal, such that the portion of the refresh clock signal is not reflected in the second signal. The isolation barrier of the digital isolator system may be a capacitive isolation barrier for galvanically isolating a receiver from the transmitter. If desired, the refresh edge generator may include a refresh mask generator, one or more logic gates, and a glitch filter. A method of operating a digital isolator system is also described.

公开(公告)号：US20200168534A1

公开(公告)日：2020-05-28

申请号：US16202663

申请日：2018-11-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Thomas Dyer BONIFIELD ,  Sreeram Subramanyam NASUM ,  Robert H. EKLUND ,  Jeffrey Alan WEST ,  Byron Lovell WILLIAMS ,  Elizabeth Costner STEWART

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00

Abstract: In some examples, a multi-chip module (MCM), comprises a first and a second die-attach pad (DAP); a first die comprising a first set of microelectronic devices; a second die comprising a first capacitor and a second capacitor; and a third die comprising a second set of microelectronic devices, where the first and second dies are positioned on the first DAP, and the third die is positioned on the second DAP. The first set of microelectronic devices couples to the first capacitor via a first inter-die connection and the second set of microelectronic devices couples to the second capacitor via a second inter-die connection.