公开(公告)号：US20230378334A1

公开(公告)日：2023-11-23

申请号：US18364964

申请日：2023-08-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Lu ,  Tzu Ang Chao ,  Chao-Ching Cheng ,  Lain-Jong Li

IPC: H01L29/76 ,  H01L27/092 ,  H01L29/24 ,  H01L29/417 ,  H01L29/49 ,  H01L29/45 ,  H01L29/786 ,  H01L21/02 ,  H01L21/4757 ,  H01L21/8256 ,  H01L29/66 ,  H01L23/31 ,  H10K10/84 ,  H10K10/88 ,  H10K10/46 ,  H10K19/10 ,  H10K85/20

CPC classification number: H01L29/7606 ,  H01L27/092 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/45 ,  H01L29/78696 ,  H01L21/02568 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/47576 ,  H01L21/8256 ,  H01L29/66969 ,  H01L23/3171 ,  H10K10/84 ,  H10K10/88 ,  H10K10/466 ,  H10K10/484 ,  H10K19/10 ,  H10K85/221

Abstract: A device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the isolation layer. The work function layer is an n-type work function layer. The device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. The dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.

公开(公告)号：US20220231153A1

公开(公告)日：2022-07-21

申请号：US17150658

申请日：2021-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Lu ,  Tzu Ang Chao ,  Chao-Ching Cheng ,  Lain-Jong Li

IPC: H01L29/76 ,  H01L23/31 ,  H01L27/092 ,  H01L29/24 ,  H01L29/417 ,  H01L29/49 ,  H01L29/45 ,  H01L29/786 ,  H01L21/02 ,  H01L21/4757 ,  H01L21/8256 ,  H01L29/66 ,  H01L27/28 ,  H01L51/00 ,  H01L51/05 ,  H01L51/10

Abstract: A device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the etch stop layer. The work function layer is an n-type work function layer. The device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. The dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.

公开(公告)号：US20240379832A1

公开(公告)日：2024-11-14

申请号：US18783516

申请日：2024-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Lu ,  Tzu Ang Chao ,  Chao-Ching Cheng ,  Lain-Jong Li

IPC: H01L29/76 ,  H01L21/02 ,  H01L21/4757 ,  H01L21/8256 ,  H01L23/31 ,  H01L27/092 ,  H01L29/24 ,  H01L29/417 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H10K10/46 ,  H10K10/84 ,  H10K10/88 ,  H10K19/10 ,  H10K85/20

Abstract: A device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the isolation layer. The work function layer is an n-type work function layer. The device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. The dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.