公开(公告)号：US20240371695A1

公开(公告)日：2024-11-07

申请号：US18204398

申请日：2023-06-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chuan-Lan Lin ,  Yu-Ping Wang ,  Chien-Ting Lin ,  Chu-Fu Lin ,  Chun-Ting Yeh ,  Chung-Hsing Kuo

IPC: H01L21/78 ,  H01L29/06

Abstract: A method for fabricating a semiconductor device includes the steps of first providing a wafer, forming a scribe line on a front side of the wafer, performing a plasma dicing process to dice the wafer along the scribe line without separating the wafer completely, performing a laminating process to form a tape on the front side of the wafer, performing a grinding process on a backside of the wafer, and then performing an expanding process to divide the wafer into chips.

公开(公告)号：US20240429093A1

公开(公告)日：2024-12-26

申请号：US18224576

申请日：2023-07-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Ting Lin ,  Kai-Kuang Ho ,  Chuan-Lan Lin ,  Yu-Ping Wang ,  Chu-Fu Lin ,  Yi-Feng Hsu ,  Yu-Jie Lin

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/784 ,  H01L23/544

Abstract: A method for fabricating a semiconductor device includes the steps of first defining a scribe line on a front side of a wafer, in which the wafer includes an inter-metal dielectric (IMD) layer disposed on a substrate and an alternating stack disposed on the IMD layer. Next, part of the alternating stack is removed to form a trench on the front side of the wafer, a dielectric layer is formed in the trench, and then a dicing process is performed along the scribe line from a back side of the wafer to divide the wafer into chips.

公开(公告)号：US20250015023A1

公开(公告)日：2025-01-09

申请号：US18229640

申请日：2023-08-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chiu-Jung Chiu ,  Chung-Hsing Kuo ,  Chun-Ting Yeh ,  Chuan-Lan Lin ,  Yu-Ping Wang ,  Yu-Chun Chen

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

Abstract: The invention provides a semiconductor structure, which comprises a plurality of metal circuit layers stacked with each other, the multi-layer metal circuit layer comprises an aluminum circuit layer which is located at the position closest to a surface among the plurality of circuit layers, the material of the aluminum circuit layer is made of aluminum, and the aluminum circuit layer comprises a concave portion.

公开(公告)号：US20240315095A1

公开(公告)日：2024-09-19

申请号：US18135741

申请日：2023-04-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chuan-Lan Lin ,  Yu-Ping Wang ,  Chien-Ting Lin ,  Chu-Fu Lin ,  Chun-Ting Yeh ,  Chung-Hsing Kuo ,  Yi-Feng Hsu

IPC: H10K59/131

CPC classification number: H10K59/131

Abstract: A semiconductor device includes a substrate having a bonding area and a pad area, a first inter-metal dielectric (IMD) layer on the substrate, a metal interconnection in the first IMD layer, a first pad on the bonding area and connected to the metal interconnection, and a second pad on the pad area and connected to the metal interconnection. Preferably, the first pad includes a first portion connecting the metal interconnection and a second portion on the first portion, and the second pad includes a third portion connecting the metal interconnection and a fourth portion on the third portion, in which top surfaces of the second portion and the fourth portion are coplanar.

公开(公告)号：US20240162401A1

公开(公告)日：2024-05-16

申请号：US18078103

申请日：2022-12-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chuan-Lan Lin ,  Yu-Ping Wang ,  Chien-Ting Lin ,  Chun-Ting Yeh

IPC: H01L33/62 ,  H01L25/075

CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L2933/0066

Abstract: A method for fabricating a micro display device includes the steps of providing a wafer comprising a first area, a second area, and a third area, forming first bonding pads on the first area, forming second bonding pads on the second area, and forming third bonding pads on the third area. Preferably, the first bonding pads and the second bonding pads are made of different materials and the first bonding pads and the third bonding pads are made of different materials.