公开(公告)号：US11488870B2

公开(公告)日：2022-11-01

申请号：US16843880

申请日：2020-04-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Yu Hsieh ,  Kuan-Ti Wang ,  Han-Chen Chen ,  Kun-Hsien Lee

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/321 ,  H01L29/49 ,  H01L21/3105

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a first gate structure on the first region, a second gate structure on the second region, and a third gate structure on the third region; forming an interlayer dielectric (ILD) layer around the first gate structure, the second gate structure, and the third gate structure; removing the first gate structure, the second gate structure, and the third gate structure to form a first recess, a second recess, and a third recess; forming a first interfacial layer in the first recess, the second recess, and the third recess; removing the first interfacial layer in the second recess; and forming a second interfacial layer in the second recess.

公开(公告)号：US20210287942A1

公开(公告)日：2021-09-16

申请号：US16843880

申请日：2020-04-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Yu Hsieh ,  Kuan-Ti Wang ,  Han-Chen Chen ,  Kun-Hsien Lee

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/321 ,  H01L29/49 ,  H01L21/28

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a first gate structure on the first region, a second gate structure on the second region, and a third gate structure on the third region; forming an interlayer dielectric (ILD) layer around the first gate structure, the second gate structure, and the third gate structure; removing the first gate structure, the second gate structure, and the third gate structure to form a first recess, a second recess, and a third recess; forming a first interfacial layer in the first recess, the second recess, and the third recess; removing the first interfacial layer in the second recess; and forming a second interfacial layer in the second recess.