公开(公告)号：US20240347108A1

公开(公告)日：2024-10-17

申请号：US18201213

申请日：2023-05-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chi-Hsiu HSU ,  Yu-Huan YEH ,  Cheng-Hsiao LAI ,  Guan-Lin CHEN ,  Chuan-Fu WANG ,  Hung-Yu FAN CHIANG

IPC: G11C13/00

CPC classification number: G11C13/0064

Abstract: A forming method of a ReRAM array includes steps as follows: Firstly, a first pulse is applied to a first ReRAM unit in the ReRAM array. Afterwards, a second pulse is applied to the first ReRAM unit, wherein the electrical property of the first pulse is opposite to that of the second pulse. Then, a verification pulse is applied to the first ReRAM unit to verify whether the first resistance value of the first ReRAM unit passes a preset threshold. When the first resistance value passes the preset threshold value, a third pulse is applied to the first ReRAM unit, wherein the first pulse and the third pulse have the same electrical property, and the first pulse has a voltage value substantially the same to that of the third pulse.

公开(公告)号：US20240164224A1

公开(公告)日：2024-05-16

申请号：US18082609

申请日：2022-12-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kai-Jiun CHANG ,  Yu-Huan YEH ,  Chuan-Fu WANG

IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

CPC classification number: H01L45/1253 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616

Abstract: A ReRAM device includes an interlayer dielectric (ILD), a lower conductive plug, a resistance-switching element (RSE) and an upper conductive plug. The ILD has an upper surface. The lower conductive plug is disposed in the ILD, and has a top surface lower than the upper surface. The RSE is disposed above the top surface and electrically contacts with the top surface. The upper conductive plug is disposed above the RSE and electrically contacts with the RSE.

公开(公告)号：US20240130254A1

公开(公告)日：2024-04-18

申请号：US18074548

申请日：2022-12-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yen-Min TING ,  Chuan-Fu WANG ,  Yu-Huan YEH

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1226 ,  H01L27/2463 ,  H01L45/1253 ,  H01L45/16

Abstract: A semiconductor device and a method for forming the same are provided. The semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first electrode, a second electrode on one side of the first electrode, and a resistive switching film between the first electrode and the second electrode. The first electrode, the resistive switching film and the second electrode are arranged along the first direction. The second semiconductor structure includes a first via and a first metal layer on the first via along a second direction and electrically connected to the first via. The first direction is perpendicular to the second direction. An upper surface of the first electrode, an upper surface of the second electrode, an upper surface of the resistive switching film and an upper surface of the first metal layer are coplanar.