公开(公告)号：US11843049B2

公开(公告)日：2023-12-12

申请号：US17533056

申请日：2021-11-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin

IPC: H01L29/76 ,  H01L29/94 ,  H01L29/78 ,  H01L29/417 ,  H01L29/06

CPC classification number: H01L29/7816 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/7851

Abstract: A lateral diffused metal oxide semiconductor (LDMOS) device includes a first fin-shaped structure on a substrate, a second fin-shaped structure adjacent to the first fin-shaped structure, a shallow trench isolation (STI) between the first fin-shaped structure and the second fin-shaped structure, a first gate structure on the first fin-shaped structure, a second gate structure on the second fin-shaped structure, and an air gap between the first gate structure and the second gate structure.

公开(公告)号：US20250040180A1

公开(公告)日：2025-01-30

申请号：US18916695

申请日：2024-10-15

Applicant: United Microelectronics Corp.

Inventor： Zong-Han Lin

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/417

Abstract: A lateral diffused metal oxide semiconductor (LDMOS) device includes a first fin-shaped structure on a substrate, a second fin-shaped structure adjacent to the first fin-shaped structure, a shallow trench isolation (STI) between the first fin-shaped structure and the second fin-shaped structure, a first gate structure on the first fin-shaped structure and part of the STI, a second gate structure on the second fin-shaped structure, and an air gap between the first gate structure and the second gate structure.

公开(公告)号：US11917836B2

公开(公告)日：2024-02-27

申请号：US17513851

申请日：2021-10-28

Applicant: United Microelectronics Corp.

Inventor： Zong-Han Lin

IPC: H10N70/00 ,  H10B63/00

CPC classification number: H10B63/30 ,  H10N70/841 ,  H10N70/8833

Abstract: The invention provides a RRAM structure, which includes a substrate, a high voltage transistor, and a RRAM cell. The high voltage transistor includes a drift region, a gate structure, a source region, a drain region, and an isolation structure. The drift region is located in the substrate. The gate structure is located on the substrate and on a portion of the drift region. The source region and the drain region are located in the substrate on two sides of the gate structure. The drain region is located in the drift region. The isolation structure is located in the drift region and between the gate structure and the drain region. The RRAM cell includes a first electrode, a resistive switching layer, and a second electrode sequentially located on the drain region. The RRAM cell is electrically connected to the high voltage transistor.

公开(公告)号：US20240055515A1

公开(公告)日：2024-02-15

申请号：US18383461

申请日：2023-10-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/06

CPC classification number: H01L29/7816 ,  H01L29/7851 ,  H01L29/41791 ,  H01L29/0649

Abstract: A lateral diffused metal oxide semiconductor (LDMOS) device includes a first fin-shaped structure on a substrate, a second fin-shaped structure adjacent to the first fin-shaped structure, a shallow trench isolation (STI) between the first fin-shaped structure and the second fin-shaped structure, a first gate structure on the first fin-shaped structure, a second gate structure on the second fin-shaped structure, and an air gap between the first gate structure and the second gate structure.

公开(公告)号：US11101384B1

公开(公告)日：2021-08-24

申请号：US17072064

申请日：2020-10-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin ,  Yi-Han Ye

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06

Abstract: A power semiconductor device includes a substrate, a first well, a second well, a drain, a source, a first gate structure, a second gate structure and a doping region. The first well has a first conductivity and extends into the substrate from a substrate surface. The second well has a second conductivity and extends into the substrate from the substrate surface. The drain has the first conductivity and is disposed in the first well. The source has the first conductivity and is disposed in the second well. The first gate structure is disposed on the substrate surface and at least partially overlapping with the first well and second well. The second gate structure is disposed on the substrate surface and overlapping with the second well. The doping region has the first conductivity, is disposed in the second well and connects the first gate structure with the second gate structure.

公开(公告)号：US12148826B2

公开(公告)日：2024-11-19

申请号：US18383461

申请日：2023-10-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin

IPC: H01L29/76 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78 ,  H01L29/94

Abstract: A lateral diffused metal oxide semiconductor (LDMOS) device includes a first fin-shaped structure on a substrate, a second fin-shaped structure adjacent to the first fin-shaped structure, a shallow trench isolation (STI) between the first fin-shaped structure and the second fin-shaped structure, a first gate structure on the first fin-shaped structure, a second gate structure on the second fin-shaped structure, and an air gap between the first gate structure and the second gate structure.

公开(公告)号：US20240072163A1

公开(公告)日：2024-02-29

申请号：US17943169

申请日：2022-09-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/402 ,  H01L29/66681

Abstract: The invention provides a laterally diffused metal-oxide-semiconductor (LDMOS), which comprises a substrate, a plurality of fin structures on the substrate, a gate structure on the substrate and spanning the fin structures, and a gate contact layer on the gate structure, wherein the gate contact layer is electrically connected with a dummy contact structure.

公开(公告)号：US20220328684A1

公开(公告)日：2022-10-13

申请号：US17314069

申请日：2021-05-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin ,  Yi-Han Ye

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

Abstract: A method for fabricating a lateral diffusion metal oxide semiconductor (LDMOS) device includes the steps of first forming a first fin-shaped structure and a second fin-shaped structure on a substrate, forming a shallow trench isolation (STI) between the first fin-shaped structure and the second fin-shaped structure, forming a first gate structure on the first fin-shaped structure and a second gate structure on the second fin-shaped structure, forming a source region on the first fin-shaped structure, forming a drain region on the second fin-shaped structure, and forming a contact field plate directly on the STI.

公开(公告)号：US20230238457A1

公开(公告)日：2023-07-27

申请号：US18128234

申请日：2023-03-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin ,  Yi-Han Ye

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/0653 ,  H01L29/401 ,  H01L29/66681 ,  H01L29/407

Abstract: A lateral diffusion metal oxide semiconductor (LDMOS) device includes a first fin-shaped structure on a substrate, a shallow trench isolation (STI) adjacent to the first fin-shaped structure, a first gate structure on the first fin-shaped structure, a spacer adjacent to the first gate structure, and a contact field plate adjacent to the first gate structure and directly on the STI. Preferably, a sidewall of the spacer is aligned with a sidewall of the first fin-shaped structure.

公开(公告)号：US11652168B2

公开(公告)日：2023-05-16

申请号：US17314069

申请日：2021-05-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zong-Han Lin ,  Yi-Han Ye

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/0653 ,  H01L29/401 ,  H01L29/407 ,  H01L29/66681

Abstract: A method for fabricating a lateral diffusion metal oxide semiconductor (LDMOS) device includes the steps of first forming a first fin-shaped structure and a second fin-shaped structure on a substrate, forming a shallow trench isolation (STI) between the first fin-shaped structure and the second fin-shaped structure, forming a first gate structure on the first fin-shaped structure and a second gate structure on the second fin-shaped structure, forming a source region on the first fin-shaped structure, forming a drain region on the second fin-shaped structure, and forming a contact field plate directly on the STI.