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    Clock receiver in semiconductor integrated circuit and method of controlling the same
    1.
    发明授权
    Clock receiver in semiconductor integrated circuit and method of controlling the same 有权
    半导体集成电路中的时钟接收器及其控制方法

    公开(公告)号：US08350604B2

    公开(公告)日：2013-01-08

    申请号：US12645630

    申请日：2009-12-23

    申请人： Won Joo Yun ,  Hyun Woo Lee ,  Ki-Han Kim

    发明人： Won Joo Yun ,  Hyun Woo Lee ,  Ki-Han Kim

    IPC分类号： H03L7/00

    CPC分类号： G06F1/12

    摘要： A clock receiver in a semiconductor integrated circuit includes a first clock buffer configured to buffer an external clock to generate a low frequency buffered clock in response to a first operation signal; a second clock buffer configured to buffer the external clock to generate a high frequency buffered clock in response to a second operation signal; and an internal clock generating unit configured to receive the low frequency buffered clock and the high frequency buffered clock, to control states of the first operation signal and the second operation signal and to generate an internal clock.

    摘要翻译： 半导体集成电路中的时钟接收器包括：第一时钟缓冲器，被配置为缓冲外部时钟以响应于第一操作信号产生低频缓冲时钟; 第二时钟缓冲器，被配置为缓冲所述外部时钟以响应于第二操作信号产生高频缓冲时钟; 以及内部时钟生成单元，被配置为接收低频缓冲时钟和高频缓冲时钟，以控制第一操作信号和第二操作信号的状态并产生内部时钟。