公开(公告)号：US11983478B2

公开(公告)日：2024-05-14

申请号：US17691771

申请日：2022-03-10

Applicant: Xilinx, Inc.

Inventor： Shant Chandrakar ,  Sourabh Anand ,  Shubham Rajput ,  Kameshwar Chandrasekar

IPC: G06F30/394 ,  G06F30/31 ,  G06F30/327 ,  G06F30/392

CPC classification number: G06F30/394 ,  G06F30/31 ,  G06F30/327 ,  G06F30/392

Abstract: A machine learning-based process includes identifying a first set of features that includes features of a reference implementation of a circuit design and features of a synthesized version of a modified version of the circuit design. A first classification model is applied to the first set of features, and the first classification model indicates a full implementation flow or an incremental implementation flow. The full implementation flow is performed on the synthesized version of the modified version in response to the first classification model indicating the full implementation flow, and the incremental implementation flow is performed on the synthesized version of the modified version in response to the first classification model indicating the incremental implementation flow. The full and incremental implementation flows generate implementation data that is suitable for making an integrated circuit (IC).

公开(公告)号：US09372953B1

公开(公告)日：2016-06-21

申请号：US14494978

申请日：2014-09-24

Applicant: Xilinx, Inc.

Inventor： Shant Chandrakar ,  Ilya K. Ganusov

IPC: G06F17/50

CPC classification number: G06F17/5077 ,  G06F17/5031 ,  G06F17/5072 ,  G06F17/5081 ,  G06F2217/84

Abstract: Processing a circuit design includes determining that an operating frequency for a first placement and routing for the circuit design does not exceed a target operating frequency, distinguishing between loop paths and feed-forward paths in the circuit design, and, responsive to determining that the operating frequency does not exceed the target operating frequency, relaxing timing constraints of the feed-forward paths using a processor. A second placement and routing is performed on the loop paths and the feed-forward paths of the circuit design.

Abstract translation: 处理电路设计包括确定用于电路设计的第一布置和布线的工作频率不超过目标工作频率，区分电路设计中的环路径和前馈路径，并且响应于确定操作 频率不超过目标工作频率，使用处理器的前馈路径的放松时序约束。 在电路设计的环路径和前馈路径上进行第二次放置和布线。