Technique for providing secure firmware
    91.
    发明申请
    Technique for providing secure firmware 有权
    提供安全固件的技术

    公开(公告)号:US20070192611A1

    公开(公告)日:2007-08-16

    申请号:US11355697

    申请日:2006-02-15

    CPC classification number: G06F21/60 G06F21/57

    Abstract: A technique to verify firmware. One embodiment of the invention uses a processor's micro-code to verify a system's firmware, such that the firmware can be included in a trusted chain of code along with the operating system.

    Abstract translation: 验证固件的技术。 本发明的一个实施例使用处理器的微代码来验证系统的固件,使得固件可以与操作系统一起被包括在可信赖的代码链中。

    OS and firmware coordinated error handling using transparent firmware intercept and firmware services
    92.
    发明申请
    OS and firmware coordinated error handling using transparent firmware intercept and firmware services 有权
    操作系统和固件协调的错误处理使用透明的固件拦截和固件服务

    公开(公告)号:US20070061634A1

    公开(公告)日:2007-03-15

    申请号:US11227831

    申请日:2005-09-15

    CPC classification number: G06F11/0793 G06F11/0706

    Abstract: Methods and architectures for performing hardware error handling using coordinated operating system (OS) and firmware services. In one aspect, a firmware interface is provided to enable an OS to access firmware error-handling services. Such services enable the OS to access error data concerning platform hardware errors that may not be directed accessed via a platform processor or through other conventional approaches. Techniques are also disclosed for intercepting the processing of hardware error events and directing control to firmware error-handling services prior to attempting to service the error using OS-based services. The firmware services may correct hardware errors and/or log error data that may be later accessed by the OS or provided to a remote management server using an out-of-band communication channel. In accordance with another aspect, the firmware intercept and services may be performed in a manner that is transparent to the OS.

    Abstract translation: 使用协调操作系统(OS)和固件服务执行硬件错误处理的方法和架构。 在一个方面,提供固件接口以使OS能够访问固件错误处理服务。 这样的服务使得OS能够访问有关平台硬件错误的错误数据,这些错误数据可能不会通过平台处理器或其他常规方法被定向访问。 还公开了用于在使用基于OS的服务尝试服务错误之前拦截硬件错误事件的处理以及将控制引导到固件错误处理服务的技术。 固件服务可以纠正OS稍后访问或使用带外通信信道提供给远程管理服务器的硬件错误和/或日志错误数据。 根据另一方面,固件拦截和服务可以以对OS是透明的方式来执行。

    Automated BIST execution scheme for a link
    93.
    发明申请
    Automated BIST execution scheme for a link 有权
    一个链接的自动BIST执行方案

    公开(公告)号:US20070011536A1

    公开(公告)日:2007-01-11

    申请号:US11157526

    申请日:2005-06-21

    CPC classification number: G06F11/27

    Abstract: Training of a link is performed, wherein the link is an interconnect between two devices of a computer system. A built-in self-test (BIST) of the link is performed. A result from the link training is compared to a result from the BIST. A link status of the link is posted, wherein the link status is based at least in part on the result from the link training and the result from the BIST.

    Abstract translation: 执行链接的训练,其中链路是计算机系统的两个设备之间的互连。 链接的内置自检(BIST)被执行。 将链接训练的结果与BIST的结果进行比较。 张贴链接的链接状态,其中链接状态至少部分地基于链接训练的结果和来自BIST的结果。

    Efficient storage and rendering of patterns in a printer

    公开(公告)号:US07130073B2

    公开(公告)日:2006-10-31

    申请号:US10141865

    申请日:2002-05-10

    CPC classification number: G06F13/124

    Abstract: Patterns are processed minimizing resources such as memory and/or processing power. According to one aspect, when a pattern object is received with the same identifier as that of an earlier received pattern, a count is maintained reflecting a number of times the earlier pattern is to be used in rendering. When the earlier pattern is used as many times as the count in the rendering operations, the earlier pattern is deleted from the memory. According to another aspect, when two patterns are defined based on the same pattern data, the pattern is stored in a common storage area, and a pointer is maintained to the storage area from both the patterns. According to another aspect, even if a pattern is to be used only in the expanded form while rendering, the pattern is stored in non-expanded form until the time of rendering to minimize memory consumption.

    Partitionable multiprocessor system
    95.
    发明申请
    Partitionable multiprocessor system 失效
    可分区多处理器系统

    公开(公告)号:US20050144434A1

    公开(公告)日:2005-06-30

    申请号:US10751250

    申请日:2003-12-31

    CPC classification number: G06F15/177 G06F1/24 G06F9/45533

    Abstract: A system that may optionally be partitioned into multiple domains is disclosed. Each domain is capable of independently powering on, executing a firmware program, and loading an operating system, including a legacy operating system, as well as running an application program that is distinct from programs running on another domain. Interrupts, including boot interrupts, reset handlers, and inter-chassis communications are initialized differently, depending on whether the system is to be partitioned or not. The cost of redundant hardware and/or firmware is substantially avoided, yet the system fully supports multiple domains.

    Abstract translation: 公开了可选地被划分成多个域的系统。 每个域都能够独立地加电,执行固件程序,以及加载包括旧版操作系统在内的操作系统,以及运行与在其他域上运行的程序不同的应用程序。 中断,包括引导中断,复位处理程序和机架间通信根据系统是否要进行分区,进行不同的初始化。 基本上避免了冗余硬件和/或固件的成本,但是系统完全支持多个域。

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