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公开(公告)号：US11100878B2
公开(公告)日：2021-08-24
申请号：US16461818
申请日：2018-11-05
Inventor： Zhichong Wang , Haoliang Zheng , Guangliang Shang , Seung Woo Han , Yinglong Huang
IPC: G09G3/36
Abstract: A shift register unit and a driving method, a grid driving circuit and a display device are disclosed. A shift register unit includes an input circuit, a first reset circuit, and an output circuit. The input circuit includes an input terminal configured to perform a first control on the first control node and the first node in response to an input signal of the input terminal, and then perform a second control on the first node under the control of the level of the first node, the first node is located in a path where the input signal incurs the first control; the first reset circuit is configured to reset the first control node in response to the first reset signal; the output circuit is configured to output an output signal to an output terminal under the control of the level of the first control node.
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公开(公告)号：US11069274B2
公开(公告)日：2021-07-20
申请号：US16497199
申请日：2019-04-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhichong Wang , Seungwoo Han , Guangliang Shang , Haoliang Zheng , Lijun Yuan , Xing Yao , Mingfu Han
Abstract: The embodiments of the present application provide a shift register unit and a method for driving the same, a gate driving circuit, and a display apparatus. Here, the shift register unit includes a first controlling sub-circuit, a first voltage dividing sub-circuit, a charging and discharging sub-circuit, and an outputting sub-circuit. Here, an output signal of the outputting sub-circuit is controlled by the charging and discharging sub-circuit. A first input signal and a second input signal input at a first input signal terminal Forward and a second input signal terminal Backward electrically coupled to the charging and discharging sub-circuit are pulse signals.
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93.发明申请公开(公告)号：US20210217339A1
公开(公告)日：2021-07-15
申请号：US16652180
申请日：2019-10-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Can Zheng , Libin Liu , Li Wang , Tian Dong , Guangliang Shang , Xinshe Yin
IPC: G09G3/00
Abstract: The present disclosure relates to a gate driving circuit applied to a foldable display panel comprising B display areas arranged in order. The gate driving circuit may include B gate driving subcircuits and a control circuit. Each of the gate driving subcircuits may correspond to one of the display areas and each of the gate driving subcircuits may comprise a plurality of stage gate driving units. The control circuit may be configured to, when the foldable display panel is in a full screen display state, control a type of an input signal in a last stage gate driving unit of a bth gate driving subcircuit to be the same as a type of an input signal in a first stage gate driving unit of a (b+1)th gate driving subcircuit, where B is an integer greater than 1 and b is a positive integer less than B.
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公开(公告)号：US10964243B2
公开(公告)日：2021-03-30
申请号：US16515880
申请日：2019-07-18
Applicant: BOE Technology Group Co., Ltd.
Inventor： Lijun Yuan , Xing Yao , Guangliang Shang , Haoliang Zheng , Zhenyu Zhang
Abstract: A shift register circuit according to an embodiment of the present disclosure includes an input sub-circuit and N-stage output sub-circuits. The input sub-circuit is configured to transmit an input signal to a pull up node at a first stage. The output sub-circuit at each stage is configured to transmit a clock signal from a clock signal terminal at a same stage to an output signal terminal at the same stage under the control of a pull-up node at the same stage. The output sub-circuit at each stage is further configured to transmit a signal transmitted to an output signal terminal at the same stage to a pull-up node at an immediately subsequent stage under the control of a shift control signal from a shift control signal terminal at the same stage.
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95.发明授权公开(公告)号：US10546546B2
公开(公告)日：2020-01-28
申请号：US15574867
申请日：2017-05-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Seungwoo Han , Guangliang Shang
Abstract: A pixel driving circuit for a display apparatus. The pixel driving circuit may include a first gate line, a second gate line, a data line, a first thin-film transistor, and a second thin-film transistor. A gate of the first thin-film transistor may be coupled to the first gate line. A source of the first thin-film transistor may be coupled to the data line. A drain of the first thin-film transistor may be coupled to a source of the second thin-film transistor. A gate of the second thin-film transistor may be coupled to the second gate line. A drain of the second thin-film transistor may be coupled to a pixel electrode.
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Patent Agency Ranking
公开(公告)号：US10482827B2
公开(公告)日：2019-11-19
申请号：US15533761
申请日：2016-12-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Seungwoo Han , Guangliang Shang
Abstract: The present application discloses a method for driving a display panel, including receiving one or more frames of image data one after another each of which having image data for a plurality of subpixels in the display panel; determining an initial driving voltage corresponding to one subpixel of the plurality of subpixels based on each frame of image data; determining an overdrive voltage corresponding to the one subpixel based on the initial driving voltage and a compensation voltage corresponding to the one subpixel, wherein an amplitude of the overdrive voltage is greater than an amplitude of the initial driving voltage; and applying the overdrive voltage to the one subpixel for an overdrive time period followed by applying the initial driving voltage to a same one subpixel for displaying a subpixel image associated with each frame of image data.
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公开(公告)号：US10424261B2
公开(公告)日：2019-09-24
申请号：US14917335
申请日：2015-08-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yanfeng Wang , Guangliang Shang , Xiaoling Xu
IPC: G09G3/36
Abstract: A pixel circuit and driving method thereof and display apparatus are disclosed. The pixel circuit comprises: a selection circuit (P1), whose input terminal is connected to a selection signal terminal, a high level signal terminal and a low level signal terminal, configured to control charging or discharging of a pixel capacitor according to a digital signal input by the selection signal terminal; a charging/discharging circuit (P2), whose input terminal is connected to an output terminal of the selection circuit and a same row gate line signal terminal corresponding to the pixel capacitor and output terminal is connected to the pixel capacitor, configured to charge or discharge the pixel capacitor under the control of the selection circuit; and a pre-charging circuit (P3), whose input terminal is connected to a previous row gate line signal terminal corresponding to the pixel capacitor and output terminal is connected to the pixel capacitor, configured to provide a reference voltage. This pixel circuit saves the digital-analogy conversion circuit and the analogy circuit part in the driving IC.
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98.发明申请公开(公告)号：US20190139475A1
公开(公告)日：2019-05-09
申请号：US16126032
申请日：2018-09-10
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhichong Wang , Haoliang Zheng , Seungwoo Han , Guangliang Shang , Mingfu Han , Lijun Yuan , Xing Yao
Abstract: A shift register circuit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register circuit includes an input sub-circuit, an output sub-circuit, a discharge sub-circuit and a noise reduction sub-circuit. The input sub-circuit is connected to an input signal terminal, a first power source terminal and a pull-down node, and configured to, under the control of an input signal, output a first power source terminal signal to the pull-down node. In the shift register circuit, the discharge sub-circuit may control the potential of the pull-down node to be an ineffective potential at the input stage, thereby preventing the noise reduction sub-circuit from affecting the potentials of the pull-up node and the output terminal under the control of the pull-down node, and ensuring normal output of the shift register circuit.
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公开(公告)号：US10255985B2
公开(公告)日：2019-04-09
申请号：US15503830
申请日：2016-08-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mingfu Han , Guangliang Shang , Yuanbo Zhang , Yujie Gao , Yan Yan , Yingmeng Miao , Seungwoo Han , Zhihe Jin , Xing Yao , Haoliang Zheng
Abstract: A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.
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公开(公告)号：US10210835B2
公开(公告)日：2019-02-19
申请号：US15656419
申请日：2017-07-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mingfu Han , Guangliang Shang , Seungwoo Han , Zhihe Jin , Xing Yao , Haoliang Zheng , Lijun Yuan , Zhichong Wang
Abstract: The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
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