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公开(公告)号：US12118939B2
公开(公告)日：2024-10-15
申请号：US18273695
申请日：2022-07-11
IPC分类号： G09G3/3233 , G09G3/3225 , G09G3/3266 , G09G3/3275 , G09G3/3291 , H10K59/121
CPC分类号： G09G3/3233 , G09G3/3225 , G09G3/3266 , G09G3/3275 , G09G3/3291 , H10K59/1213 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0852 , G09G2300/0861 , G09G2310/0251 , G09G2310/061 , G09G2310/08 , G09G2320/0247 , G09G2320/045 , G09G2330/021
摘要： A pixel circuit and a driving method therefor, an array substrate and a display device are provided. The pixel circuit includes a driving circuit, a data writing circuit, a first initialization circuit. The driving circuit is configured to control a driving current; the data writing circuit is configured to write a data signal into the control terminal of the driving circuit; the first initialization circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit, and includes a first transistor; the data writing circuit includes a second transistor and the driving circuit includes a third transistor; semiconductor materials of active layers of both the first transistor and the second transistor have a smaller leakage current characteristic than a semiconductor material of a third active layer of the third transistor.
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公开(公告)号：US11972711B2
公开(公告)日：2024-04-30
申请号：US17415717
申请日：2020-12-29
发明人： Tian Dong , Shiming Shi , Bo Wang , Jingquan Wang
IPC分类号： G09G3/20
CPC分类号： G09G3/20 , G09G2300/043 , G09G2310/08 , G09G2320/0252
摘要： Provided are a display panel, a drive method thereof and a display apparatus. The display panel includes M*N display units disposed in an array defined by intersections of (M+1) gate lines and N pairs of data lines, and each pair of data lines include a first data line and a second data line; in an mth display row, display units of odd display columns are connected to an mth gate line, and display units of even display columns are connected to an (m+1)th gate line; in an nth display column, display units of odd display rows are connected to first data lines of an nth pair of data lines, and display units of even display rows are connected to second data lines of the nth pair of data lines.
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3.发明授权公开(公告)号：US11763740B2
公开(公告)日：2023-09-19
申请号：US17762330
申请日：2021-04-15
发明人： Guangliang Shang , Libin Liu , Tian Dong , Jiangnan Lu , Shiming Shi
IPC分类号： G09G3/20 , G09G3/3208 , G11C19/28 , G09G3/3225
CPC分类号： G09G3/3225 , G11C19/28 , G09G2300/0426 , G09G2300/0852 , G09G2310/0286 , G09G2310/08 , G09G2320/0223 , G09G2320/0233 , G09G2320/0247
摘要： The present disclosure provides a signal generation circuit, a signal generation method, a signal generation module and a display device. The signal generating circuit includes an input terminal, a signal output terminal, a transmission control circuit, a first output circuit, and an output control circuit; the output control circuit is electrically connected to a first output control terminal, a second output control terminal, a second voltage terminal, the signal writing-in terminal, the signal output terminal and the first voltage terminal, configured to control to connect the signal writing-in terminal and the second voltage terminal under the control of a second output control signal provided by the second output control terminal, and control to connect the signal output terminal and the first voltage terminal under the control of a first output control signal provided by the first output control terminal. The present disclosure expands an adjustment range of frequency of a PWM signal.
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公开(公告)号：US11605341B2
公开(公告)日：2023-03-14
申请号：US17424478
申请日：2021-01-05
发明人： Lujiang Huangfu , Tian Dong , Libin Liu , Xinshe Yin
IPC分类号： G09G3/3233 , G09G3/3266 , G09G3/3291
摘要： The present disclosure provides a pixel circuit, a pixel driving method and a display device. The pixel circuit includes a driving circuit, an energy storage circuit and a switch control circuit. A first end of the energy storage circuit is coupled to a control end of the driving circuit, a second end of the energy storage circuit is coupled to a first end of the driving circuit via the switch control circuit, and the energy storage circuit is configured to store a voltage. The switch control circuit is configured to control the second end of the energy storage circuit to be electrically coupled to a voltage application end or the first end of the driving circuit under the control of a light-emission control signal from a light-emission control line. The driving circuit is configured to generate a driving current in accordance with a voltage between the control end and first end of the driving circuit.
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公开(公告)号：US11468840B2
公开(公告)日：2022-10-11
申请号：US17119171
申请日：2020-12-11
IPC分类号： G09G3/3258 , G09G3/3275 , G09G3/3266 , H01L27/32 , H01L27/12 , G09G3/3233
摘要： Embodiments of the present disclosure provide a driving backplane and a display panel. The driving backplane has a plurality of sub-pixel regions, and includes: a base; a plurality of pixel driving circuits disposed on the base, one of the plurality of pixel driving circuits being disposed in one of the plurality of sub-pixel regions; and a plurality of data lines and a plurality of first power supply voltage lines disposed on the base. The pixel driving circuit is electrically connected to a data line and a first power supply voltage line. The data line and the first power supply voltage line are disposed on a side, away from the base, of the pixel driving circuit, and the data line and the first power supply voltage line are disposed at intervals in a same layer. An orthographic projection of the data line on the base overlaps with an orthographic projection of the pixel driving circuit on the base. The pixel driving circuit includes a driving transistor, a first switching transistor, and a first conductive pattern. The first conductive pattern is located on a side, away from the base, of the driving transistor and the first switching transistor. The first conductive pattern is electrically connected to a gate of the driving transistor through a first via. The first conductive pattern is electrically connected to a second electrode of the first switching transistor through a second via. An orthographic projection of the first conductive pattern on the base is located within an orthographic projection of the first power supply voltage line on the base.
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公开(公告)号：US11270617B2
公开(公告)日：2022-03-08
申请号：US17051584
申请日：2020-03-23
发明人： Xinshe Yin , Tian Dong
IPC分类号： G09G3/20
摘要： A driving circuit for a display panel is disclosed, where the display panel comprises data lines. The driving circuit for the display panel includes a share line coupled to the data lines; a power supply circuit connected to the share line, and configured to provide a share voltage to the share line; and switch units coupled to the data lines, where each of the switch units has a first end coupled to the share line and a second end coupled to a corresponding one of the data lines, and the switch units are configured to, in a share phase, connect the data lines and transmit the share voltage on the share line to the data lines in response to a control signal. The display panel drive circuit can reduce the power consumption of a source drive circuit of the display panel.
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公开(公告)号：US20210327348A1
公开(公告)日：2021-10-21
申请号：US16618876
申请日：2019-05-31
发明人： Tian Dong
IPC分类号： G09G3/3233 , G09G3/3275
摘要： A pixel circuit, comprising: a compensation sub-circuit (30), and a storage sub-circuit (40). The compensation sub-circuit (30) is configured to adjust a potential of a second node (P2) based on a potential of a first node (P1) in response to a first control signal from a first control signal terminal (S1), and to adjust a potential of the control node (P3) based on a potential of a first terminal of a driving transistor (M0) in response to a second control signal from a second control signal terminal (S2). The storage sub-circuit (40) is configured to adjust the potential of the control node (P3) based on the potential of the second node (P2). The driving transistor (M0) is a N-type transistor.
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公开(公告)号：US09894782B2
公开(公告)日：2018-02-13
申请号：US14914468
申请日：2015-07-20
发明人： Tian Dong
CPC分类号： H05K5/0017 , G06F1/1616 , G06F1/1624 , G06F1/1652 , G09F9/00 , G09F9/301 , H05K5/0217
摘要： A foldable display device and a display apparatus are provided. The foldable display device includes a supporting back plate and a display screen arranged in the front side of the supporting back plate. The supporting back plate includes a first supporting part and a second supporting part, and the first supporting part and the second supporting part may bend towards to the reverse side of the supporting back plate through a folding connection. One end of the display screen is fixedly connected to the first supporting part, and the other end of the display screen is slidably connected to the second supporting part.
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公开(公告)号：US11996055B2
公开(公告)日：2024-05-28
申请号：US17794400
申请日：2021-06-21
发明人： Tian Dong , Bo Wang , Jingquan Wang
IPC分类号： G09G3/3275
CPC分类号： G09G3/3275 , G09G2310/0297 , G09G2310/08
摘要： A display panel includes a sub-pixel array, gate lines, first data lines, second data lines, a pixel control circuit and a time-division multiplexing circuit. The sub-pixel array includes a plurality of sub-pixels arranged in rows and columns. Sub-pixels in a same row are coupled to the pixel control circuit through at least one gate line. Sub-pixels located in odd-numbered rows in sub-pixels in a same column are coupled to a first data line, and sub-pixels located in even-numbered rows in the sub-pixels in the same column are coupled to a second data line. The time-division multiplexing circuit is coupled to the plurality of first data lines, the plurality of second data lines, and a data signal terminal. The time-division multiplexing circuit is configured to electrically connect the data signal terminal to the first data lines and the second data lines in a time-division manner.
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公开(公告)号：US11847954B2
公开(公告)日：2023-12-19
申请号：US17600078
申请日：2021-02-02
发明人： Tian Dong
IPC分类号： G09G3/20
CPC分类号： G09G3/2092 , G09G2300/0452 , G09G2310/0278
摘要： Provided are a pixel circuitry, a control method thereof and a display device. The pixel circuitry includes: a plurality of sub-pixels arranged in an array; a plurality of gate lines extending in a first direction, where all sub-pixels located in one row are electrically coupled to one gate line; a plurality of first signal lines and a plurality of second signal lines extending in a second direction, where all sub-pixels located in odd-numbered rows and one column are electrically coupled to one first signal line, and all sub-pixels located in even-numbered rows and one column are electrically coupled to one second signal line, the second direction being perpendicular to the first direction; and a plurality of data lines extending in the second direction, where two first signal lines and two second signal lines coupled to two adjacent columns of sub-pixels are electrically coupled to one data line.
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