System and method for shuffling mapping sequences
    91.
    发明申请
    System and method for shuffling mapping sequences 失效
    用于混洗映射序列的系统和方法

    公开(公告)号:US20050040980A1

    公开(公告)日:2005-02-24

    申请号:US10767774

    申请日:2004-01-30

    申请人: Kevin Miller

    发明人: Kevin Miller

    IPC分类号: H03M3/00 H03M1/82

    摘要: A sequence mapping circuit and method for digital audio circuits generates a pulsed output. Over time, the mapping circuit generates pulses with a substantially identical average centroid for each of the possible output waveforms. For at least some of the output waveforms, two or more sets of pulses are provided representing the same waveform but having different centroids. The output is alternated among the available sets of pulses to maintain the desired average centroid over time. Shuffling of the output among the available pulses representing a given waveform may be randomly determined, or the pulses used may be tracked and the output pulses sequentially alternated among the available output pulses. The shuffled mapping method reduces output harmonics compared to conventional static mappers.

    摘要翻译: 用于数字音频电路的序列映射电路和方法产生脉冲输出。 随着时间的推移,映射电路为每个可能的输出波形产生具有基本相同的平均质心的脉冲。 对于至少一些输出波形,提供表示相同波形但具有不同质心的两组或多组脉冲。 输出在可用的脉冲组之间交替,以保持期望的平均质心。 表示给定波形的可用脉冲之间的输出的混洗可以是随机确定的,或者可以跟踪使用的脉冲,并且输出脉冲在可用输出脉冲之间顺序交替。 与传统静态映射器相比,混洗映射方法降低了输出谐波。

    Computer program product for performing digital-to-analog conversion
    92.
    发明申请
    Computer program product for performing digital-to-analog conversion 失效
    用于执行数模转换的计算机程序产品

    公开(公告)号:US20050040979A1

    公开(公告)日:2005-02-24

    申请号:US10956058

    申请日:2004-10-04

    IPC分类号: H03M3/04 H03M1/66 H03M3/00

    CPC分类号: H03M3/502 H03M3/504

    摘要: The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.

    摘要翻译: 本发明涉及一种包括数字Σ-Δ调制器,抽取滤波器和多位DAC的Σ-Δ数模转换(DAC)。 数字Σ-Δ调制器接收数字输入信号并从其产生量化的数字信号。 抽取滤波器接收量化的数字信号并从其产生抽取的数字信号。 多位DAC接收抽取的数字信号并从其产生模拟输出信号。 模拟输出信号代表数字输入信号。