公开(公告)号：US07707321B2

公开(公告)日：2010-04-27

申请号：US11928124

申请日：2007-10-30

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen ,  Horng-Yee Chou

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen ,  Horng-Yee Chou

IPC分类号： G06F3/00 ,  G06F13/38

CPC分类号： G06F13/28 ,  Y02D10/14

摘要： An extended Universal-Serial Bus (EUSB) host has reduced loading by using radio frequency (RF) transceivers or direct wiring traces rather than a pair of legacy USB cables. The reduced loading opens the eye pattern. The EUSB device transfers internal data using chained Direct-Memory Access (DMA). Registers in a DMA controller point to a vector table that has vector entries, each pointing to a destination and a source. The source is a memory table for a memory group. The memory table has entries for several memory segments. Each memory-table entry has a pointer to a memory segment and a byte count for the segment. Once all bytes in the segment are transferred, a flag in the entry indicates when another memory segment follows within the memory group. When an END flag is read, then vector table is advanced to the next vector entry, and another memory group of memory segments processed.

摘要翻译： 扩展的通用串行总线（EUSB）主机通过使用射频（RF）收发器或直接布线轨迹而不是一对传统的USB电缆减少了负载。 减少负荷打开眼睛图案。 EUSB设备使用链接的直接内存访问（DMA）传输内部数据。 DMA控制器中的寄存器指向具有向量条目的向量表，每个向量表指向一个目的地和一个源。 源是内存组的内存表。 内存表有几个内存段的条目。 每个存储表条目具有指向存储器段的指针和段的字节计数。 一旦片段中的所有字节都被传送，该条目中的标志表示在存储器组中跟随其他内存段的时间。 读取END标志时，向量表前进到下一个向量条目，并处理另一个内存段的内存组。

公开(公告)号：US20100082893A1

公开(公告)日：2010-04-01

申请号：US12631761

申请日：2009-12-04

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/10

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20100082892A1

公开(公告)日：2010-04-01

申请号：US12631748

申请日：2009-12-04

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input— output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20100030961A9

公开(公告)日：2010-02-04

申请号：US11466759

申请日：2006-08-23

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US07576990B2

公开(公告)日：2009-08-18

申请号：US11683292

申请日：2007-03-07

申请人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K1/14

CPC分类号： H05K5/0269 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H05K5/026

摘要： A case-grounded flash-memory drive has a printed-circuit board assembly (PCBA) with flash-memory chips and a controller chip. The PCBA is encased inside an upper case and a lower case, with a Serial AT-Attachment (SATA) connector that fits through and opening between the cases. The cases can be assembled with the PCBA by a snap-together, ultrasonic-press, screw-fastener, or thermal-bond adhesive method. Dual-axis case-grounding pins draw any electro-static-discharges (ESD) current off the upper case along a primary axis and onto a PCBA ground through a secondary axis washer that is screwed into the PCBA. The primary axis body of the dual-axis case-grounding pins fits around a PCBA notch while the secondary axis passes through a metalized alignment hole for grounding. When the SATA connector is inserted into a host, the host ground sinks ESD currents collected by the dual-axis case-grounding pins.

摘要翻译： 外壳接地闪存驱动器具有带闪存芯片的印刷电路板组件（PCBA）和控制器芯片。 PCBA被封装在上壳体和下壳体内，并具有穿过并在壳体之间打开的串行AT附件（SATA）连接器。 这些情况可以通过卡扣，超声波压力机，螺纹紧固件或热粘合粘合剂方法与PCBA组装。 双轴外壳接地引脚通过螺纹连接到PCBA中的次轴垫圈将初始轴上的任何静电放电（ESD）电流从主轴上吸入PCBA接地。 双轴壳体 - 接地销的主轴体装配在PCBA槽口周围，而副轴线穿过金属化的对准孔进行接地。 当SATA连接器插入主机时，主机接地将吸收由双轴外壳接地引脚收集的ESD电流。

公开(公告)号：US07507119B2

公开(公告)日：2009-03-24

申请号：US11309847

申请日：2006-10-12

申请人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H01R13/648

CPC分类号： H01R13/6658 ,  H01R13/7175 ,  H05K5/0278

摘要： A Universal-Serial-Bus (USB) device has a USB plug with reduced wobble. A USB metal wrap around the perimeter of the USB plug is attached to a housing by overmolding. A plug supporter is inserted into the front of the USB metal wrap, and has locking tabs that snap over the inside wall of the housing. Side tabs on the plug supporter fit into side slots on the USB metal wrap to secure the plug supporter inside the USB metal wrap. A circuit board with a USB flash controller has USB metal contacts on an extension end that is inserted through the housing and into the USB metal wrap. The extension end fits underneath top tabs on the plug supporter, preventing the extension end with the USB metal contacts from upward wobble when the USB plug is inserted into a USB socket.

摘要翻译： 通用串行总线（USB）设备具有减少摆动的USB插头。 围绕USB插头的周边的USB金属包裹通过包覆成型附接到外壳。 插头支撑件插入USB金属包装的前部，并具有卡在外壳内壁上的锁定片。 插头支架上的侧面接头装配在USB金属外壳上的侧插槽中，以将插头支撑件固定在USB金属包装内。 带有USB闪存控制器的电路板在扩展端有USB金属触点，插入通过外壳和USB金属外壳。 延长端配合在插头支架上的顶部卡舌下方，当USB插头插入USB插座时，防止USB金属触点的延伸端向上摆动。

公开(公告)号：US20080313388A1

公开(公告)日：2008-12-18

申请号：US11929776

申请日：2007-10-30

申请人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

公开(公告)号：US20080250195A1

公开(公告)日：2008-10-09

申请号：US12139842

申请日：2008-06-16

申请人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K19/07 ,  G06K19/07354

摘要： A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.

摘要翻译： 闪存系统具有可以并行访问的多个闪存芯片的通道。 主机数据被多通道控制器处理器分配给一个通道，并且累积在多通道页缓冲器中。 当到达页面缓冲区中的页面边界时，如果逻辑扇区地址（LSA）匹配，则页缓冲区将被写入目标物理块（如果已满）或与聚合闪存块（AFB）中的旧数据片段组合。 因此，使用AFB聚集小片段，减少闪存块的擦除和磨损。 发生STOP命令时，页面缓冲区被复制到AFB。 每个通道都有一个或多个AFB，它们由AFB跟踪表进行跟踪。

公开(公告)号：US20080235443A1

公开(公告)日：2008-09-25

申请号：US12115128

申请日：2008-05-05

申请人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/1416 ,  G06F3/0664 ,  G06F12/0851 ,  G06F12/0866 ,  G06F12/0897 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06F2212/2022 ,  Y02D10/13

摘要： A flash memory system stores blocks of data in Non-Volatile Memory Devices (NVMD) that are addressed by a logical block address (LBA). The LBA is remapped for wear-leveling and bad-block relocation by the NVMD. The NVMD are interleaved in channels that are accessed by a NVMD controller. The NVMD controller has a controller cache that caches blocks stored in NVMD in that channel, while the NVMD also contain high-speed cache. The multiple levels of caching reduce access latency. Power is managed in multiple levels by a power controller in the NVMD controller that sets power policies for power managers inside the NVMD. Multiple NVMD controllers in the flash system may each controller many channels of NVMD. The flash system with NVMD may include a fingerprint reader for security.

摘要翻译： 闪存系统存储由逻辑块地址（LBA）寻址的非易失性存储器件（NVMD）中的数据块。 NVBA将对LBA进行重新配置以进行磨损均衡和坏块重定位。 NVMD在由NVMD控制器访问的通道中进行交织。 NVMD控制器具有缓存存储在该通道中的NVMD中的块的控制器高速缓存，而NVMD还包含高速缓存。 多级缓存可以减少访问延迟。 电源由NVMD控制器中的电源控制器以多级管理，为NVMD内的电源管理器设置电源策略。 闪存系统中的多个NVMD控制器可以各自控制多个NVMD通道。 具有NVMD的闪存系统可能包括用于安全性的指纹读取器。

公开(公告)号：US07428605B2

公开(公告)日：2008-09-23

申请号：US11309842

申请日：2006-10-11

申请人： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F13/12 ,  H01R29/00

CPC分类号： H01R13/6658 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H01R13/7175 ,  H05K5/0278

摘要： A Universal-Serial-Bus (USB) device has a USB plug that is centered over a center-line of a circuit board. The circuit board with flash memory and a USB flash controller has metal pads that a USB connector is soldered to. The USB connector has a rear step that is about half the height of the USB connector plug. Contacts on the rear step are soldered to the metal pads on the circuit board so that the USB connector is centered around the edge of the circuit board. The overall height of the flash device can be reduced since the bulky USB connector is not attached off-center to the circuit board, but is attached at the half-height rear step. Both the USB connector and the circuit board share the same center line, allowing a printed-circuit board assembly (PCBA) to be symmetric around the center line.

摘要翻译： 通用串行总线（USB）设备具有以电路板中心线为中心的USB插头。 具有闪存的电路板和USB闪存控制器具有焊接USB连接器的金属焊盘。 USB连接器的后部步骤大约是USB连接器插头高度的一半。 后台上的触点焊接到电路板上的金属焊盘，使得USB连接器围绕电路板的边缘居中。 由于笨重的USB连接器不会偏离电路板的中心位置，而是在半高后方的步骤安装，因此闪光装置的整体高度可以减小。 USB连接器和电路板共享相同的中心线，允许印刷电路板组件（PCBA）围绕中心线对称。