公开(公告)号：US4656648A

公开(公告)日：1987-04-07

申请号：US691080

申请日：1985-01-09

申请人： Robert Vallet

发明人： Robert Vallet

IPC分类号： H04L27/152 ,  H04L27/18 ,  H04L27/233 ,  H04L27/22

CPC分类号： H04L27/2332 ,  H04L27/1525

摘要： The present invention relates to a process for the noncoherent demodulation of a linearly modulated digital signal with energy by constant symbol and a demodulator for performing this process. The process consists of demodulating a linearly modulated signal by a sequence of information symbols .alpha..sub.0, . . . , .alpha..sub.N-1 to which has been added a Gaussian white noise. The signal received is processed by the demodulator in order to obtain sequences of blocks of L data, containing all the information of the received signal. By means of a recursive algorithm, from said data is deduced a sequence of symbols .alpha..sub.0, . . . , .alpha..sub.N-1, maximizing an approximate probability function. The invention more particularly applies to satellite links and to vehicle radio communications.

摘要翻译： PCT No.PCT / FR84 / 00123 Sec。 371日期1985年1月9日第 102（e）日期1985年1月9日PCT提交1984年5月4日PCT公布。 出版物WO84 / 04640 日期：1984年11月22日。本发明涉及一种通过常数符号对具有能量的线性调制数字信号进行非相干解调的方法，以及用于执行该处理的解调器。 该过程包括通过一系列信息符号α0解调线性调制信号。 。 。 ，已经添加了高斯白噪声的αN-1。 接收到的信号由解调器处理，以便获得包含接收信号的所有信息的L数据块的序列。 通过递归算法，从所述数据推导出一系列符号α0，。 。 。 ，αN-1，使近似概率函数最大化。 本发明更具体地适用于卫星链路和车载无线电通信。

公开(公告)号：US4651107A

公开(公告)日：1987-03-17

申请号：US687575

申请日：1984-12-28

申请人： Yoshihiko Akaiwa

发明人： Yoshihiko Akaiwa

IPC分类号： H04L27/152 ,  H03D3/00

CPC分类号： H04L27/1525

摘要： An FM demodulator for demodulating a signal which has been frequency modulated by a digital signal. The FM demodulator includes mixers, low-pass filters and limiters. All the circuit elements succeeding the mixers are operable in the baseband, while all the circuit elements succeeding the limiters are comprised of digital circuit elements. The FM demodulator with such a construction is suitable for an integrated circuit.

摘要翻译： 一种FM解调器，用于解调已被数字信号频率调制的信号。 FM解调器包括混频器，低通滤波器和限幅器。 所有跟随混频器的电路元件都可以在基带中工作，而所有限制器之后的电路元件都由数字电路元件组成。 具有这种结构的FM解调器适用于集成电路。

公开(公告)号：US4649551A

公开(公告)日：1987-03-10

申请号：US622746

申请日：1984-06-20

申请人： Hans-Dieter Sander ,  Wulf-Christian Streckenbach

发明人： Hans-Dieter Sander ,  Wulf-Christian Streckenbach

IPC分类号： H04L27/152 ,  H04L27/16 ,  H04L27/14

CPC分类号： H04L27/16 ,  H04L27/152

摘要： Decoder for a frequency keyed signal, particularly an FSK videotext signal. To avoid isochronous distortions, precise matching of the decoder is necessary. Due to the provision of a additional AFC circuit (11) to regulate the natural frequency of the VCO (5) in the PLL loop (3-5) of the decoder, such matching is no longer required.

摘要翻译： 用于频率键控信号的解码器，特别是FSK录像机信号。 为了避免同步失真，解码器的精确匹配是必要的。 由于提供了额外的AFC电路（11）来调节解调器的PLL环路（3-5）中的VCO（5）的固有频率，所以不再需要这种匹配。

公开(公告)号：US4618967A

公开(公告)日：1986-10-21

申请号：US624749

申请日：1984-06-26

申请人： Ian A. W. Vance ,  Michael W. Neale

发明人： Ian A. W. Vance ,  Michael W. Neale

IPC分类号： H04L27/00 ,  H03D1/22 ,  H03D3/00 ,  H04L27/14 ,  H04L27/152 ,  H04B1/16

CPC分类号： H03D3/007 ,  H04L27/1525 ,  A23V2002/00 ,  H03D1/22

摘要： A radio receiver for frequency modulated signals in which direct conversion techniques are used to provide zero I.F. quadrature baseband signals I & Q. The I & Q signals are limited (11,12) to form square wave signals and pulse forming networks (13,14) derive pulse sequences the frequencies of which represent the polarity changes in the square wave signals. Each square wave is multiplied (15,16) by the pulse sequence derived from the other square wave to produce a unipolar pulse train. The two unipolar pulse trains are combined (17) to give a digital output signal the frequency of which is equal to the sum of the frequencies of the two pulse trains. Low pass filtering the output signal produces a simulation of the original baseband modulation.

摘要翻译： 用于频率调制信号的无线电接收机，其中使用直接转换技术来提供零I.F。 正交基带信号I＆Q。I＆Q信号被限制（11,12）以形成方波信号，脉冲形成网络（13,14）导出其频率表示方波信号极性变化的脉冲序列。 每个方波乘以（15,16）由其他方波导出的脉冲序列，以产生单极脉冲序列。 组合两个单极脉冲串（17）以产生数字输出信号，其频率等于两个脉冲序列的频率之和。 低通滤波输出信号产生原始基带调制的仿真。

公开(公告)号：US4388730A

公开(公告)日：1983-06-14

申请号：US251320

申请日：1981-04-06

申请人： Donald H. Nash ,  Duen H. Yen

发明人： Donald H. Nash ,  Duen H. Yen

IPC分类号： H04M11/06 ,  H03G3/34 ,  H04B1/10 ,  H04B10/00 ,  H04B10/02 ,  H04B10/18 ,  H04L27/14 ,  H04L27/152 ,  H04M11/00 ,  H04B1/16

CPC分类号： H03G3/34 ,  H04L27/14 ,  H04L27/152

摘要： A noise detector and data signal receiver for a frequency modulation system has a first phaselock loop circuit (300), responsive to the received signal, for providing a signal indicative of the noise level and a first stage of demodulation of the received signal. A high speed comparator (330) of the first phaselock loop circuit provides a 90 degree phase-shifted signal which exhibits lesser delay and is substantially in phase with the input. Accordingly, the noise detection capability of the phaselock loop circuit (300) is improved. A second phaselock loop (200), also responsive to the received signal, extracts a voice signal from the received signal. A third phaselock loop (400) responsive to the once demodulated output signal of the first phaselock loop (300), extracts a digital data signal from the received signal. Squelch circuits (120, 121), activated at separate particular levels of noise, are responsive to the noise level indicator signal of the first phaselock loop. In addition, a noise proportional signal is provided to a speaker for providing the user of a hands-free telephone system of which the present receiver comprises a component with an audible feedback of the noise.

摘要翻译： 用于频率调制系统的噪声检测器和数据信号接收器具有响应于所接收的信号的第一锁相环电路（300），用于提供指示噪声电平的信号和接收信号的第一级解调。 第一锁相环电路的高速比较器（330）提供90度的相移信号，其表现出更小的延迟并与输入基本上同相。 因此，提高了锁相环电路（300）的噪声检测能力。 也响应于接收到的信号的第二锁相环（200）从接收到的信号中提取语音信号。 响应于第一锁相环（300）的一次解调的输出信号的第三锁相环（400）从接收信号中提取数字数据信号。 在独立的特定噪声水平下激活的静噪电路（120,121）响应于第一相位锁相环的噪声电平指示信号。 此外，向扬声器提供噪声比例信号，以向用户提供免提电话系统，其中本接收机包括具有噪声的可听反馈的组件。

公开(公告)号：US4072905A

公开(公告)日：1978-02-07

申请号：US775861

申请日：1977-03-09

申请人： James M. Keelty

发明人： James M. Keelty

IPC分类号： H03L7/18 ,  H04L27/152 ,  H04L27/16 ,  H04L27/18 ,  H04L27/22 ,  H03D3/00

CPC分类号： H03L7/18 ,  H04L27/152 ,  H04L27/16 ,  H04L27/22

摘要： An input circuit for a wide acquisition range minimum shift keying demodulator includes a pair of phase-locked loops (PLL). Each PLL is designed to receive from a frequency doubler a respective one of two discrete spectral lines in the frequency spectrum separated by a frequency equal to the bit rate. Each PLL operates at one of three frequencies including its own search position frequency and the search position frequency of the other PLL plus or minus the bit rate. A logic decision circuit responsive to the PLLs operates with a frequency synthesizer connected to a mixer at the input of the doubler so that when one PLL locks to one spectral line, the other PLL is operated at its respective frequencies to lock to the other spectral line.

摘要翻译： 用于宽采集范围最小移位键控解调器的输入电路包括一对锁相环（PLL）。 每个PLL被设计为从频率倍增器接收频率等于比特率的频率的频谱中的两个离散谱线中的相应一个。 每个PLL以三个频率中的一个工作，包括其自身的搜索位置频率和另一个PLL的搜索位置频率加或减去比特率。 响应于PLL的逻辑判决电路与在倍增器的输入处连接到混频器的频率合成器一起工作，使得当一个PLL锁定到一个谱线时，另一个PLL以其各自的频率操作以锁定到另一个频谱线 。

公开(公告)号：US4053836A

公开(公告)日：1977-10-11

申请号：US604196

申请日：1975-08-13

申请人： Jean Fellrath

发明人： Jean Fellrath

IPC分类号： H04L27/12 ,  H03L7/08 ,  H04L27/10 ,  H04L27/152 ,  H04B1/26 ,  H04L27/14

CPC分类号： H04L27/152

摘要： A device for transmission of information by pulse code frequency shift modulation. The device incorporates a phase-locked superheterodyne receiver including a single voltage controlled oscillator, and a demodulator including a phase comparator and a phase shifter. The intermediate frequency is equal to one half the input signal frequency shift. The comparator compares the phases of the intermediate frequency signal and of a signal of the same frequency derived from the voltage controlled oscillator to provide a message output.

摘要翻译： 用于通过脉冲码频移调制传输信息的装置。 该装置包括一个包括单个压控振荡器的锁相超外差接收器和一个包括相位比较器和移相器的解调器。 中频等于输入信号频移的一半。 比较器比较中频信号和从压控振荡器导出的相同频率的信号的相位，以提供消息输出。

公开(公告)号：US3967202A

公开(公告)日：1976-06-29

申请号：US491829

申请日：1974-07-25

申请人： James E. Batz

发明人： James E. Batz

IPC分类号： G01S13/78 ,  H04L1/04 ,  H04L27/12 ,  H04L27/152 ,  H04B1/59 ,  G01S9/56

CPC分类号： H04L27/12 ,  G01S13/78 ,  H04L1/04 ,  H04L27/152

摘要： A data transmission system for obtaining information from a plurality of data sources includes an interrogate source for transmitting RF interrogate signals to the locations of the data sources and a transponder associated with each data source for receiving the interrogate signals and for generating RF reply signals representing the information. The transponder includes a transmitter having a voltage controlled oscillator responsive to data signals at first and second levels to generate sinusoidal output signals at first and second frequencies, respectively, a wave shaping circuit which converts the output signals to sawtooth wave signals at the corresponding frequencies and an FM oscillator for providing a carrier signal which is modulated by the sawtooth signals to produce a broad spectrum of sideband signals of approximately equal amplitude.

摘要翻译： 用于从多个数据源获取信息的数据传输系统包括用于将RF询问信号发送到数据源的位置的询问源和与每个数据源相关联的应答器，用于接收询问信号并产生表示 信息。 应答器包括发射机，其具有响应于第一和第二电平的数据信号的压控振荡器，分别在第一和第二频率处产生正弦输出信号;波形整形电路，其将输出信号转换成相应频率处的锯齿波信号;以及 FM振荡器，用于提供由锯齿波信号调制的载波信号，以产生近似相等幅度的宽带边带信号。

公开(公告)号：US3860874A

公开(公告)日：1975-01-14

申请号：US42156873

申请日：1973-12-04

申请人： US INTERIOR

发明人： MALONE JAMES T ,  BRENNAN RICHARD L ,  HALLOCK DONALD D

IPC分类号： H04L27/152 ,  H04L27/14

CPC分类号： H04L27/152

摘要： Apparatus for receiving double frequency shift keying signals (DFSK) employs a phase locked loop as the frequency discriminator for tracking the four frequency states. A floating detector establishes reference voltage levels for a trio of comparators which form a binary code indicative of the number of these levels exceeded by the input signal. This code is converted by logic into mark and space signals which are held in a register until transferred to the output devices by a strobe signal.

摘要翻译： 用于接收双频移键控信号（DFSK）的装置采用锁相环作为用于跟踪四种频率状态的鉴频器。 浮动检测器建立三个比较器的参考电压电平，其形成表示由输入信号超出的这些电平的数量的二进制代码。 该代码由逻辑转换成保持在寄存器中的标记和空间信号，直到通过选通信号传送到输出设备。

公开(公告)号：US3859459A

公开(公告)日：1975-01-07

申请号：US33292573

申请日：1973-02-16

申请人： EXXON RESEARCH ENGINEERING CO

发明人： FORD JR HERBERT P

IPC分类号： H03D3/24 ,  H04L27/152 ,  H04N1/00 ,  H03D3/00 ,  H04B1/16 ,  H04N1/40

CPC分类号： H04L27/152 ,  H03D3/241 ,  H04N1/00095

摘要： FM signals within a predetermined bandwidth represent dark-light variations in a document transmitted over a communications network to a facsimile receiver. Demodulation of the FM signals is accomplished by a phase locked loop comprising a doubly balanced modulator and a voltage controlled oscillator. The fundamental FM frequencies which are applied to the doubly balanced modulator are doubled to permit attenuation of the doubled fundamentals without adversely affecting the high frequency variations in the demodulated signal.

摘要翻译： 在预定带宽内的FM信号表示通过通信网络传输到传真接收机的文档中的暗光变化。 FM信号的解调由包括双平衡调制器和压控振荡器的锁相环实现。 施加到双平衡调制器的基频FM频率加倍，以允许双倍基波的衰减，而不会对解调信号中的高频变化产生不利影响。