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公开(公告)号:US20180198653A1
公开(公告)日:2018-07-12
申请号:US15726993
申请日:2017-10-06
Applicant: MEDIATEK Singapore Pte. Ltd.
Inventor: Junmin Cao , Hon Cheong Hor , Tieng Ying Choke
CPC classification number: H04L27/152 , H01P1/18 , H03D1/22 , H03D2200/005 , H03D2200/006 , H04B5/0031 , H04L1/0003 , H04L7/0338 , H04L27/0008 , H04L27/066 , H04L27/2649 , H04L27/3809 , H04L27/3818 , H04L27/3881 , H04N7/084
Abstract: A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately π/2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.
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2.
公开(公告)号:US20170302358A1
公开(公告)日:2017-10-19
申请号:US15638215
申请日:2017-06-29
Applicant: QUALCOMM Incorporated
Inventor: Lai Kan LEUNG , Chiewcharn NARATHONG , Rajagopalan RANGARAJAN , Dongling PAN , Yiwu TANG , Aleksandar Miodrag TASIC
IPC: H04B7/08 , H04B1/00 , H04B1/16 , H04L27/152
CPC classification number: H04B7/0897 , H04B1/0082 , H04B1/16 , H04L27/152
Abstract: Certain aspects of the present disclosure provide multi-way diversity receivers with multiple synthesizers. Such a multi-way diversity receiver may be implemented in a carrier aggregation (CA) transceiver. One example wireless reception diversity circuit generally includes three or more receive paths for processing received signals and two or more frequency synthesizing circuits configured to generate local oscillating signals to downconvert the received signals. Each of the frequency synthesizing circuits is shared by at most two of the receive paths, and each pair of the frequency synthesizing circuits may generate a pair of local oscillating signals having the same frequency.
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公开(公告)号:US20170237588A1
公开(公告)日:2017-08-17
申请号:US15503892
申请日:2015-08-11
Applicant: Sony Corporation
Inventor: Seiji Kobayashi , Toshiyuki Hiroi , Katsuyuki Tanaka , Tamotsu Ikeda , Hitoshi Tomiyama , Makoto Sato , Hiroyuki Mita
IPC: H04L27/12 , H04L27/227 , H04L27/152 , H04L27/20
CPC classification number: H04L27/12 , H04L27/125 , H04L27/14 , H04L27/152 , H04L27/16 , H04L27/20 , H04L27/227 , H04L27/2272 , H04L2027/0018
Abstract: The present technology relates to a signal processing apparatus and method which can suppress increase in power consumption.In an aspect of the present technology, control data, which is for controlling frequency modulation to a carrier signal using digital data to be transmitted, and for suppressing a time average of a fluctuation amount of a frequency modulation amount more than a case of controlling the frequency modulation to the carrier signal using the digital data is generated, the frequency modulation is performed to the carrier signal on the basis of the generated control data, and the carrier signal to which the frequency modulation is performed is transmitted as a transmission signal. The present technology can be applied to, for example, a signal processing apparatus, a transmission apparatus, a reception apparatus, a communication apparatus, or an electronic apparatus having a transmission function, a reception function, or a communication function, or a computer which controls these.
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公开(公告)号:US09722831B2
公开(公告)日:2017-08-01
申请号:US15164741
申请日:2016-05-25
Applicant: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
Inventor: Liwei Shen , Ruijin Liu , Song Pan
IPC: H04L27/14 , H04L27/152 , H04B1/10 , H03J1/00 , H04L27/148
CPC classification number: H04L27/152 , H03J1/0008 , H04B1/1027 , H04L27/148
Abstract: The invention provides a carrier frequency offset processing method, an apparatus and a receiver. The method comprises: receiving, through a software and hardware interface, an estimated value of frequency offset of a data packet transmitted by an automatic frequency offset control module; collecting the received estimated value of frequency offset of the data packet and performing statistical analysis to obtain a statistical value of carrier frequency offset between a receiving module and a transmitting module; and dynamically adjusting, according to the statistical value of carrier frequency offset, a bandwidth of a low-pass filter through the software and hardware interface. The invention realizes dynamic adjustment of the bandwidth of the low-pass filter in the process of a receiver receiving signals, solving the problem of the impact on processing performance brought by the fixed bandwidth of a low-pass filter in the prior art.
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5.
公开(公告)号:US09712226B2
公开(公告)日:2017-07-18
申请号:US14677056
申请日:2015-04-02
Applicant: QUALCOMM Incorporated
Inventor: Lai Kan Leung , Chiewcharn Narathong , Rajagopalan Rangarajan , Dongling Pan , Yiwu Tang , Aleksandar Miodrag Tasic
IPC: H04B1/16 , H04B7/08 , H04L27/152 , H04B1/00
CPC classification number: H04B7/0897 , H04B1/0082 , H04B1/16 , H04L27/152
Abstract: Certain aspects of the present disclosure provide multi-way diversity receivers with multiple synthesizers. Such a multi-way diversity receiver may be implemented in a carrier aggregation (CA) transceiver. One example wireless reception diversity circuit generally includes three or more receive paths for processing received signals and two or more frequency synthesizing circuits configured to generate local oscillating signals to downconvert the received signals. Each of the frequency synthesizing circuits is shared by at most two of the receive paths, and each pair of the frequency synthesizing circuits may generate a pair of local oscillating signals having the same frequency.
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公开(公告)号:US09660798B2
公开(公告)日:2017-05-23
申请号:US14997056
申请日:2016-01-15
Applicant: Intel IP Corporation
Inventor: Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Bernd-Ulrich Klepser , Zdravko Boos , Georgios Palaskas , Stefano Pellerano , Paolo Madoglio
IPC: H04L27/36 , H04L27/12 , H04L7/033 , H04B7/06 , H04L27/20 , H04W88/06 , H03L7/16 , H04B7/0413 , H04L27/152 , H03K5/00
CPC classification number: H04L7/033 , H03K2005/00234 , H03L7/16 , H04B7/0413 , H04B7/06 , H04L27/152 , H04L27/1525 , H04L27/20 , H04W88/06
Abstract: This application discusses, among other things, apparatus and methods for sharing a local oscillator between multiple wireless devices. In certain examples, an apparatus can include a central frequency synthesizer configured to provide a central oscillator signal having a first frequency, a first transmitter, the first transmitter including a first transmit digital-to-time converter (DTC) configured to receive the central oscillator signal and to provide a first transmitter signal having a second frequency, and a first receiver, the first receiver including a first receive DTC configured to receive the central oscillator signal and to provide a first receiver signal having a first receive frequency.
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公开(公告)号:US20170134198A1
公开(公告)日:2017-05-11
申请号:US15415320
申请日:2017-01-25
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Hidenori OKUNI , Akihide SAI , Masanori FURUTA
IPC: H04L27/227 , H04L27/152 , H04L27/144 , H04L7/04
CPC classification number: H04L27/227 , H04L7/041 , H04L27/144 , H04L27/152
Abstract: A radio communication device has a local oscillator to generate a local signal, a first mixer to mix a binary continuous phase frequency shift keying signal and the local signal so as to generate a baseband signal, a first filter to remove an unnecessary frequency component included in the baseband signal, a delay device to delay an output signal of the first filter by one symbol, and a wave detector to demodulate the continuous phase frequency shift keying signal, wherein a modulation index m of the continuous phase frequency shift keying signal is a value expressed by m=n+k where 0
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8.
公开(公告)号:US20150365115A1
公开(公告)日:2015-12-17
申请号:US14735915
申请日:2015-06-10
Applicant: Proteus Digital Health, Inc.
Inventor: Lawrence Arne , Kit Yee Au-Yeung , Kenneth C. Crandall , Timothy Robertson
IPC: H04B1/10 , H04B13/00 , H04L27/22 , H04B1/12 , H04L27/152
CPC classification number: H04B1/1027 , A61B5/0028 , A61B5/0031 , A61B5/7257 , A61B2560/0209 , G06F19/00 , H04B1/123 , H04B13/005 , H04L1/0036 , H04L1/0045 , H04L27/152 , H04L27/22 , H04L27/2271 , H04L27/2273
Abstract: The invention provides a receiver associated with a body, e.g., located inside or within close proximity to a body, configured to receive and decode a signal from an in vivo transmitter which located inside the body. Signal receivers of the invention provide for accurate signal decoding of a low-level signal, even in the presence of significant noise, using a small-scale chip, e.g., where the chip consumes very low power. Also provided are systems that include the receivers, as well as methods of using the same.
Abstract translation: 本发明提供一种与身体相关联的接收器,例如位于身体内部或紧邻身体,被配置为接收和解码来自位于体内的体内发射器的信号。 本发明的信号接收机即使在存在显着噪声的情况下也能使用小尺寸芯片(例如芯片消耗非常低的功率)来提供对低电平信号的精确信号解码。 还提供了包括接收器的系统,以及使用它们的方法。
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公开(公告)号:US09143087B2
公开(公告)日:2015-09-22
申请号:US14083900
申请日:2013-11-19
Applicant: QUALCOMM Incorporated
Inventor: Eunmo Kang , Le Nguyen Luong , Yossef Tsfaty
IPC: H03D3/00 , H04L27/14 , H04L27/148 , H04L27/152 , H04B1/16
CPC classification number: H03D3/006 , H03D3/00 , H03D3/001 , H03D2200/0045 , H03D2200/0054 , H04B1/1646 , H04L27/14 , H04L27/148 , H04L27/152
Abstract: Methods, systems, and devices are described for an adaptive demodulator that supports multiple modes. An FM signal may be received at a demodulator and parameters corresponding to the FM signal may be identified. Connections between multiple modules within the demodulator may be configured, based at least in part on the parameters, to select one of multiple demodulation modes supported by the demodulator to demodulate the FM signal. The modes may include a phase differencing mode, a phase-locked loop (PLL) mode, a frequency-compressive feedback (FCF) mode, and/or a quadrature detector mode. The parameters may include one or both of a signal strength of the FM signal and a maximum frequency deviation of the FM signal. Based on the parameters, one or more signals may be generated to configure the connections within the demodulator. A switch from one mode to another may occur when one of the parameters breaches a threshold value.
Abstract translation: 为支持多种模式的自适应解调器描述了方法,系统和设备。 可以在解调器处接收FM信号,并且可以识别与FM信号对应的参数。 至少部分地基于参数,解调器内的多个模块之间的连接可以被配置为选择由解调器支持的多个解调模式之一以解调FM信号。 这些模式可以包括相位差分模式,锁相环(PLL)模式,频率 - 压缩反馈(FCF)模式和/或正交检测器模式。 参数可以包括FM信号的信号强度和FM信号的最大频率偏差中的一个或两个。 基于这些参数,可以生成一个或多个信号来配置解调器内的连接。 当其中一个参数违反阈值时,可能会发生从一种模式切换到另一种模式的切换。
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公开(公告)号:US08537934B2
公开(公告)日:2013-09-17
申请号:US11331520
申请日:2006-01-12
Applicant: Robindra B. Joshi , Jeffrey S. Putnam , Thuji S. Lin , Paul T. Yang
Inventor: Robindra B. Joshi , Jeffrey S. Putnam , Thuji S. Lin , Paul T. Yang
IPC: H04L27/00
CPC classification number: H04L27/152 , H04L27/2602 , H04L27/261 , H04L27/2657 , H04L27/2675 , H04L2027/0028 , H04L2027/0055 , H04L2027/0067 , H04L2027/0069 , H04L2027/0083
Abstract: A method of compensating for carrier frequency and phase errors of a received multi-carrier modulated signal. The received multi-carrier signal including modulated carriers for transmitting known data and unmodulated carriers for error correction, comprising, time domain down converting the received multi-carrier signal to base-band to provide a down-converted signal, the down-converted signal including a plurality of modulated carriers for transmitting known data and unmodulated carriers for error correction. Sampling an unmodulated carrier of the down-converted signal to provide received data samples. Providing a reference signal derived from the unmodulated carrier of the down-converted signal. And, estimating phase errors from a phase difference between the ummodulated carrier and the reference signal derived from the unmodulated carrier of the down-converted signal to provide a plurality of received sample phase error estimates for each modulated carrier.
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