公开(公告)号：US08947161B2

公开(公告)日：2015-02-03

申请号：US13692084

申请日：2012-12-03

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat ,  Philippe Gorisse

IPC: H03G3/20 ,  H03F1/02 ,  H03F3/24

CPC classification number: H03F1/0211 ,  H03F1/0227 ,  H03F3/245 ,  H03F2200/459 ,  H03F2200/511

Abstract: Circuitry, which includes a linear amplifier and a linear amplifier power supply, is disclosed. The linear amplifier at least partially provides an envelope power supply signal to a radio frequency (RF) power amplifier (PA) using a selected one of a group of linear amplifier supply voltages. The linear amplifier power supply provides at least one of the group of linear amplifier supply voltages. Selection of the selected one of the group of linear amplifier supply voltages is based on a desired voltage of the envelope power supply signal.

Abstract translation: 公开了包括线性放大器和线性放大器电源的电路。 线性放大器至少部分地使用一组线性放大器电源电压中的所选择的一个向射频（RF）功率放大器（PA）提供包络电源信号。 线性放大器电源提供至少一组线性放大器电源电压。 所选择的一组线性放大器电源电压的选择是基于包络电源信号的期望电压。

公开(公告)号：US20150023458A1

公开(公告)日：2015-01-22

申请号：US14334978

申请日：2014-07-18

Applicant: RF Micro Devices, Inc.

Inventor： Christopher Truong Ngo

IPC: H04L25/49

CPC classification number: H04L25/4904 ,  H04L25/14

Abstract: Two Manchester encoded bit streams each bit stream with accompanying embedded clock data are disclosed. The two encoded bit streams are encoded at the source using opposite polarities of the source clock to position transitions within the bit streams at the rising and falling edges of the source clock. The receiver may extract the clock data from both bit streams. Because both rising and falling edge clock data is available between the two bit streams, the receiver does not need a phase locked loop (PLL) or incur the accompanying expense of such PLL. Further, by avoiding use of a PLL, a nearly all digital circuit may be created, which may provide further cost and space savings. Still further, a higher data throughput is provided without increasing pin count or signal bandwidth.

Abstract translation: 公开了两个曼彻斯特编码比特流，每个比特流与伴随的嵌入式时钟数据。 使用源时钟的相反极性在源处对两个编码比特流进行编码，以在源时钟的上升沿和下降沿定位位流内的转换。 接收机可以从两个比特流中提取时钟数据。 因为两个比特流之间的上升沿和下降沿时钟数据都可用，所以接收机不需要锁相环（PLL）或者产生这种PLL的伴随费用。 此外，通过避免使用PLL，可以创建几乎所有的数字电路，这可以提供进一步的成本和空间节省。 此外，提供更高的数据吞吐量而不增加引脚数或信号带宽。

公开(公告)号：US20140342678A1

公开(公告)日：2014-11-20

申请号：US14282393

申请日：2014-05-20

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat

IPC: H04B1/44

CPC classification number: H04B1/44 ,  H04B1/0064 ,  H04L5/001

Abstract: Front end circuitry for a mobile terminal includes separate receive paths and filtering elements for different portions of each operating band. Accordingly, the filtering elements for each receive path can be designed with a smaller pass-band, thereby reducing the complexity of filtering circuitry in the front end circuitry and improving the efficiency thereof.

Abstract translation: 用于移动终端的前端电路包括用于每个工作频带的不同部分的单独的接收路径和滤波元件。 因此，用于每个接收路径的滤波元件可以设计成具有较小的通带，从而降低前端电路中的滤波电路的复杂性并提高其效率。

公开(公告)号：US20140334048A1

公开(公告)日：2014-11-13

申请号：US14271899

申请日：2014-05-07

Applicant: RF Micro Devices, Inc.

Inventor： Kathleen Muhonen

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: Embodiments of electrostatic discharge (ESD) protection circuits are disclosed along with methods of providing ESD protection. In one embodiment, an ESD protection circuit includes a first ESD protection clamp and a second ESD protection clamp operably associated in a dual-polarity ESD protection configuration. The first ESD protection clamp includes a trigger path and a clamped ESD protection path. The first ESD protection clamp is configured to trigger the clamped ESD protection path in response to an input voltage reaching a trigger voltage level. The second ESD protection clamp breaks down in response to the input voltage reaching a clamp breakdown voltage level that has a magnitude equal to or greater than the trigger voltage level. Since the clamp breakdown voltage level is equal to or greater than the trigger voltage level provided by the first ESD protection clamp, the ESD protection circuit can provide better ESD protection performance ratings.

Abstract translation: 公开了静电放电（ESD）保护电路的实施例以及提供ESD保护的方法。 在一个实施例中，ESD保护电路包括可操作地与双极性ESD保护配置相关联的第一ESD保护钳和第二ESD保护钳。 第一个ESD保护钳包括一个触发路径和一个钳位的ESD保护路径。 第一个ESD保护钳位配置为触发钳位的ESD保护路径，以响应输入电压达到触发电压电平。 响应于输入电压达到钳位击穿电压电平，第二ESD保护钳位中断，该钳位击穿电压电平的幅度等于或大于触发电压电平。 由于钳位击穿电压电平等于或大于由第一ESD保护钳提供的触发电压电平，ESD保护电路可以提供更好的ESD保护性能等级。

公开(公告)号：US20140328220A1

公开(公告)日：2014-11-06

申请号：US14267095

申请日：2014-05-01

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat ,  Marcus Granger-Jones

IPC: H04L5/14 ,  H04L5/08 ,  H04B1/52

CPC classification number: H04B1/0064 ,  H04L5/001 ,  H04L5/0041

Abstract: Front end circuitry for a wireless communication system includes a first antenna node, a second antenna node, a first triplexer, a second triplexer, and front end switching circuitry coupled between the first triplexer, the second triplexer, the first antenna node, and the second antenna node. The front end switching circuitry is configured to selectively couple the first triplexer to one of the first antenna node and the second antenna node and couple the second triplexer to a different one of the first antenna node and the second antenna node. By using a first triplexer and a second triplexer in the mobile front end circuitry, the mobile front end circuitry may operate in one or more carrier aggregation configurations while reducing the maximum load presented to the first antenna node and the second antenna node, thereby improving the performance of the front end circuitry.

Abstract translation: 用于无线通信系统的前端电路包括耦合在第一三工器，第二三工器，第一天线节点和第二天线节点之间的第一天线节点，第二天线节点，第一三工器，第二三工器和前端开关电路 天线节点。 前端开关电路被配置为选择性地将第一三工器耦合到第一天线节点和第二天线节点之一，并将第二三工器耦合到第一天线节点和第二天线节点中的不同的天线节点。 通过在移动前端电路中使用第一三工器和第二三工器，移动前端电路可以在一个或多个载波聚合配置中操作，同时减少呈现给第一天线节点和第二天线节点的最大负载，从而改善 前端电路的性能。

公开(公告)号：US08878606B2

公开(公告)日：2014-11-04

申请号：US13661552

申请日：2012-10-26

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat ,  Michael R. Kay ,  Philippe Gorisse

IPC: H03G3/20 ,  H02M3/156 ,  H02M1/15 ,  H02M1/00

CPC classification number: H02M3/156 ,  H02M1/15 ,  H02M2001/0045 ,  H02M2001/0048 ,  H03F1/0216 ,  H03F3/2171 ,  Y02B70/1491

Abstract: A direct current (DC)-DC converter, which includes a parallel amplifier and a switching supply, is disclosed. The switching supply includes switching circuitry, a first inductive element, and a second inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The second inductive element is coupled between the feedback input and the parallel amplifier output.

Abstract translation: 公开了一种包括并联放大器和开关电源的直流（DC）-DC转换器。 开关电源包括开关电路，第一电感元件和第二电感元件。 并联放大器具有反馈输入和并行放大器输出。 开关电路具有开关电路输出。 第一电感元件耦合在开关电路输出和反馈输入之间。 第二电感元件耦合在反馈输入端和并行放大器输出端之间。

公开(公告)号：US20140306766A1

公开(公告)日：2014-10-16

申请号：US14049433

申请日：2013-10-09

Applicant: RF Micro Devices, Inc.

Inventor： Jinsung Choi ,  Marcelo Jorge Franco

IPC: H03F1/32

CPC classification number: H03F3/19 ,  H03F1/0261

Abstract: Integrated pulse shaping biasing circuitry for a radio frequency (RF) power amplifier includes a square wave signal generator and an inverted ramp signal generator. The square wave signal generator and the inverted ramp signal generator are coupled in parallel between an input node and current summation circuitry. The square wave signal generator generates a square wave signal. The inverted ramp signal generator generates an inverted ramp signal. The current summation circuitry receives the generated square wave signal and the inverted ramp signal, and combines the signals to generate a pulse shaped biasing signal for an RF power amplifier. The square wave signal generator, the inverted ramp signal generator, and the current summation circuitry are monolithically integrated on a single semiconductor die.

Abstract translation: 用于射频（RF）功率放大器的集成脉冲整形偏置电路包括方波信号发生器和反相斜坡信号发生器。 方波信号发生器和反相斜坡信号发生器在输入节点和电流求和电路之间并联耦合。 方波信号发生器产生方波信号。 反相斜坡信号发生器产生反相斜坡信号。 电流求和电路接收产生的方波信号和反相斜坡信号，并组合该信号以产生用于RF功率放大器的脉冲形偏置信号。 方波信号发生器，反相斜坡信号发生器和电流求和电路单片集成在单个半导体管芯上。

公开(公告)号：US20140266428A1

公开(公告)日：2014-09-18

申请号：US14212199

申请日：2014-03-14

Applicant: RF Micro Devices, Inc.

Inventor： Jean-Frederic Chiron ,  Nadim Khlat

IPC: H03F1/02 ,  H03F3/20 ,  H03F3/189

CPC classification number: H03F1/02 ,  H03F1/0222 ,  H03F3/189 ,  H03F3/20

Abstract: A radio frequency (RF) system includes an RF power amplifier (PA), which uses an envelope tracking power supply voltage to provide an RF transmit signal, which has an RF envelope; and further includes an envelope tracking power supply, which provides the envelope tracking power supply voltage based on a setpoint. RF transceiver circuitry, which includes envelope control circuitry and an RF modulator is disclosed. The envelope control circuitry provides the setpoint, such that the envelope tracking power supply voltage is clipped to form clipped regions and substantially tracks the RF envelope between the clipped regions, wherein a dynamic range of the envelope tracking power supply voltage is limited. The RF modulator provides an RF input signal to the RF PA, which receives and amplifies the RF input signal to provide the RF transmit signal.

Abstract translation: 射频（RF）系统包括RF功率放大器（PA），其使用包络跟踪电源电压来提供具有RF包络的RF发射信号; 并且还包括一个包络跟踪电源，它根据设定点提供包络跟踪电源电压。 公开了包括封装控制电路和RF调制器的RF收发器电路。 包络控制电路提供设定点，使得包络跟踪电源电压被限幅以形成限幅区域，并且基本上跟踪限幅区域之间的RF包络，其中包络跟踪电源电压的动态范围受到限制。 RF调制器向RF PA提供RF输入信号，RF PA接收并放大RF输入信号以提供RF发射信号。

公开(公告)号：US20140266427A1

公开(公告)日：2014-09-18

申请号：US14212154

申请日：2014-03-14

Applicant: RF Micro Devices, Inc.

Inventor： Jean-Frederic Chiron

IPC: H03F1/26 ,  H03F3/20 ,  H03F3/189

CPC classification number: H03F1/26 ,  H03F1/0222 ,  H03F1/0266 ,  H03F3/189 ,  H03F3/20

Abstract: A radio frequency (RF) power amplifier (PA) and an envelope tracking power supply are disclosed. The RF PA receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply voltage. The envelope tracking power supply provides the envelope power supply voltage based on a setpoint, which has been constrained so as to limit a noise conversion gain (NCG) of the RF PA to not exceed a target NCG.

Abstract translation: 公开了射频（RF）功率放大器（PA）和包络跟踪电源。 RF PA接收并放大RF输入信号，以使用包络电源电压提供RF发射信号。 信封跟踪电源基于设定点提供包络电源电压，该设定点被限制，以将RF PA的噪声转换增益（NCG）限制为不超过目标NCG。

公开(公告)号：US20140253244A1

公开(公告)日：2014-09-11

申请号：US14202493

申请日：2014-03-10

Applicant: RF Micro Devices, Inc.

Inventor： Andrew F. Folkmann

IPC: H03F3/19 ,  H03F3/21

CPC classification number: H03F3/19 ,  H03F1/0244 ,  H03F1/3247 ,  H03F3/21 ,  H03F3/245 ,  H03F2200/411 ,  H03G3/3042

Abstract: This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of reducing (and possibly cancelling) modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit.

Abstract translation: 本公开一般涉及功率放大装置及其操作方法。 功率放大装置能够减少（并且可能地消除）将电源电压的电源电压电平的纹波变化调制到射频（RF）信号上。 在一个实施例中，功率放大装置包括功率放大电路，功率放大电路被配置为利用电源电压放大RF信号，使得电源电压的电源电压电平的纹波变化根据转换增益被调制到RF信号上。 然而，功率放大装置还包括多个纹波抑制电路。 多个纹波抑制电路被配置为产生RF信号中的相移和一个或多个幅度偏移，以便降低功率放大电路的转换增益。