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公开(公告)号:US11689222B2
公开(公告)日:2023-06-27
申请号:US17830410
申请日:2022-06-02
Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim
CPC classification number: H03M13/152 , H03M13/116 , H03M13/1162 , H03M13/1165 , H03M13/271 , H03M13/2778 , H03M13/618 , H03M13/6362 , H03M13/253 , H03M13/255 , H03M13/2906 , H03M13/6393 , H03M13/6552
Abstract: A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.
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102.
公开(公告)号:US11606168B2
公开(公告)日:2023-03-14
申请号:US17397843
申请日:2021-08-09
Inventor: Sung-Ik Park , Jae-Young Lee , Sun-Hyoung Kwon , Nam-Ho Hur , Heung-Mook Kim
Abstract: An apparatus and method for transmitting broadcast signal to which channel bonding is applied are disclosed. The apparatus according to the present invention includes an input formatting unit configured to generate baseband packets corresponding to a plurality of packet types using data corresponding to a physical layer pipe; a stream partitioner configured to partition the baseband packets into a plurality of partitioned streams corresponding to the plurality of packet types; BICM units configured to perform error correction encoding, interleaving and modulation corresponding to the plurality of partitioned streams, respectively; and waveform generators configured to generate RF transmission signals corresponding to the plurality of partitioned streams, respectively.
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公开(公告)号:US11539379B2
公开(公告)日:2022-12-27
申请号:US17385678
申请日:2021-07-26
Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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公开(公告)号:US11463109B2
公开(公告)日:2022-10-04
申请号:US17198091
申请日:2021-03-10
Inventor: Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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105.
公开(公告)号:US11463106B2
公开(公告)日:2022-10-04
申请号:US17202475
申请日:2021-03-16
Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim
IPC: G06F11/00 , H03M13/00 , H03M13/11 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/15 , G06T7/162 , H04W72/04
Abstract: A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.
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公开(公告)号:US11387846B2
公开(公告)日:2022-07-12
申请号:US17202035
申请日:2021-03-15
Inventor: Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号:US11265017B2
公开(公告)日:2022-03-01
申请号:US16808288
申请日:2020-03-03
Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
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公开(公告)号:US11206103B2
公开(公告)日:2021-12-21
申请号:US16542007
申请日:2019-08-15
Inventor: Sun-Hyoung Kwon , Jae-Young Lee , Sung-Ik Park , Bo-Mi Lim , Heung-Mook Kim , Jin-Hyuk Song
Abstract: An apparatus and method for broadcast signal frame using a boundary between Physical Layer Pipes (PLPs) of a core layer are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the time interleaver uses one of time interleaver groups, and a boundary between the time interleaver groups is a boundary between Physical Layer Pipes (PLPs) of a core layer corresponding to the core layer signal.
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公开(公告)号:US11159177B2
公开(公告)日:2021-10-26
申请号:US16560875
申请日:2019-09-04
Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
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110.
公开(公告)号:US11038535B2
公开(公告)日:2021-06-15
申请号:US16658254
申请日:2019-10-21
Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim
Abstract: A parity puncturing apparatus and method for variable length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
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