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    DETERMINING PROCESSING TIME FOR HIGH FREQUENCY RANGE
    113.
    发明公开
    DETERMINING PROCESSING TIME FOR HIGH FREQUENCY RANGE 审中-公开

    公开(公告)号：US20230362914A1

    公开(公告)日：2023-11-09

    申请号：US17440615

    申请日：2021-01-14

    Applicant: Apple Inc.

    Inventor： Hong HE ,  Dawei ZHANG ,  Oghenekome OTERI ,  Chunxuan YE ,  Seyed Ali Akbar FAKOORIAN ,  Chunhai YAO ,  Yushu ZHANG ,  Wei ZENG ,  Sigen YE

    IPC: H04W72/1263 ,  H04W72/51

    CPC classification number: H04W72/1263 ,  H04W72/51

    Abstract: Some embodiments include an apparatus, method, and computer program product for facilitating processing times in a 5G wireless communications system. When operating at higher frequency subcarrier spacing (SCS), slot times for receiving and/or transmitting data between user equipment (UE) and a 5G Node B (gNB) become shorter. Because of this, some UE may face difficulty in processing physical downlink shared channel (PDSCH), physical uplink shared channel (PUSCH), and/or physical downlink control channel (PDCCH) data with sufficient speed. To address potential limitations, a flexible minimum processing time may be used to accommodate different UE processing capabilities. The UE may report its processing capabilities to the gNB. The gNB may then schedule communications according to the UE’s processing capabilities. The gNB may consider whether the UE implements a single or multiple processing engines. Further, the gNB may apply single-slot and/or multi-slot scheduling techniques to also prevent timing issues.

    JOINT CHANNEL ESTIMATION FOR MULTIPLE DOWNLINK TRANSMISSIONS
    116.
    发明公开
    JOINT CHANNEL ESTIMATION FOR MULTIPLE DOWNLINK TRANSMISSIONS 审中-公开

    公开(公告)号：US20230344677A1

    公开(公告)日：2023-10-26

    申请号：US18129672

    申请日：2023-03-31

    Applicant: Apple Inc.

    Inventor： Chunxuan YE ,  Haitong SUN ,  Hong HE ,  Yushu ZHANG ,  Wei ZENG ,  Seyed Ali Akbar FAKOORIAN ,  Sigen YE ,  Chunhai YAO ,  Dawei ZHANG ,  Weidong YANG

    IPC: H04L25/02 ,  H04L5/00 ,  H04W72/0446

    CPC classification number: H04L25/0204 ,  H04L5/0051 ,  H04W72/0446

    Abstract: Mechanisms are provided for a user equipment (UE) to perform joint channel estimation for multiple downlink transmissions. A method performed by a UE can include reporting, to a base station, a capability of the lIE to perform joint channel estimation, receiving a configuration for joint channel estimation, where the configuration includes a time domain window (TDW) indicating a duration of the joint channel estimation, and further determining whether to perform the joint channel estimation. Based on a determination to perform the joint channel estimation, the method can include determining an actual time domain window within the TDW for performing the joint channel estimation, and performing the joint channel estimation within the actual time domain window for a first physical downlink shared channel (PDSCH) transmission based on a first demodulation reference signals (DMRS), and a second PDSCH transmission based on a second DMRS.

    DOWNLINK (DL) AND UPLINK (UL) SCHEDULING FOR TRANSMISSION ABOVE 52.6 GHZ
    117.
    发明公开
    DOWNLINK (DL) AND UPLINK (UL) SCHEDULING FOR TRANSMISSION ABOVE 52.6 GHZ 审中-公开

    公开(公告)号：US20230239846A1

    公开(公告)日：2023-07-27

    申请号：US17439680

    申请日：2020-10-16

    Applicant: Apple Inc.

    Inventor： Haitong SUN ,  Dawei ZHANG ,  Huaning NIU ,  Oghenekome OTERI ,  Chunhai YAO ,  Chunxuan YE ,  Hong HE ,  Sigen YE ,  Weidong YANG ,  Yushu ZHANG ,  Wei ZENG

    IPC: H04W72/0453 ,  H04W72/23 ,  H04W72/02

    CPC classification number: H04W72/0453 ,  H04W72/23 ,  H04W72/02

    Abstract: Some aspects of this disclosure relate to apparatuses and methods for implementing downlink and uplink scheduling in communication above 52.6 GHz. For example, some aspects of this disclosure relate to a base station. The base station includes a transceiver configured to communicate over a wireless network with a user equipment (UE) and a processor communicatively coupled to the transceiver. The processor determines that the communication between the base station and the UE is in a frequency range above 52.6 GHz. In response to the determination, the processor disables a frequency main resource assignment (FDRA), modifies a Resource Block Group (RBG) size, or modifies a Resource Indication Value (RIV) determination. The processor generates a Downlink Channel Indicator (DCI) based at least on one or more of the disabled FDRA, the modified RBG size, or the modified RIV determination. The processor transmits, using the transceiver, the DCI to the UE.

    Systems and Methods for PDCCH Repetition Reception
    119.
    发明公开
    Systems and Methods for PDCCH Repetition Reception 审中-公开

    公开(公告)号：US20230171031A1

    公开(公告)日：2023-06-01

    申请号：US17593326

    申请日：2021-01-14

    Applicant: Apple Inc.

    Inventor： Yushu ZHANG ,  Chunhai YAO ,  Dawei ZHANG ,  Haitong SUN ,  Hong HE ,  Oghenekome OTERI ,  Sigen YE ,  Wei ZENG ,  Weidong YANG

    IPC: H04L1/08 ,  H04W72/23

    CPC classification number: H04L1/08 ,  H04W72/23

    Abstract: A user equipment (UE) monitors a Physical Downlink Control Channel (PDCCH). The UE receives a configuration for a physical downlink control channel (PDCCH) including repetitions for PDCCH candidates comprising first PDCCH data, wherein the PDCCH candidates are repeated across multiple durations of a DL resource grid, detects, based on a repetition detection scheme, each of the PDCCH candidates and combines soft bits from each of the PDCCH candidates, wherein the combined soft bits are jointly decoded to determine the first PDCCH data and calculates a number of blind decodes (BDs) for the durations of the DL resource grid carrying the PDCCH candidates, wherein at least one BD value for the PDCCH candidates is scaled by a scaling factor for the calculation of the number of BDs.

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