公开(公告)号：US06969647B2

公开(公告)日：2005-11-29

申请号：US10963231

申请日：2004-10-12

Applicant: Alan Devoe ,  Lambert Devoe ,  Hung Trinh

Inventor： Alan Devoe ,  Lambert Devoe ,  Hung Trinh

IPC: H01G4/005 ,  H01G4/06 ,  H01G4/12 ,  H01G4/228 ,  H01G4/33 ,  H01L21/02 ,  H01L21/8242

CPC classification number: H01G4/005 ,  H01G4/06 ,  H01G4/228 ,  H01G4/33

Abstract: A method of making a monolithic or essentially monolithic single layer capacitor with high structural strength and capacitance. Sheets of green-state ceramic dielectric material and ceramic/metal composite material are laminated together, diced into individual chips, and fired to sinter the ceramic together. The composite material may contain an amount of metal sufficient to render the composite conductive whereby the composite may be used for one or both electrodes and for mounting the capacitor to the pc board. Alternatively, the composite material may contain an amount of metal insufficient to render the composite conductive but sufficient to act as seed points for an electroplating process wherein the composite is preferentially coated with conductive metal, and the coated composite is mounted to the pc board and the coating provides an electrical connection to an internal electrode. Vertically-oriented surface mountable capacitors and hybrid capacitors are provided.

Abstract translation: 制造具有高结构强度和电容的单片或基本单片单层电容器的方法。 将绿色陶瓷电介质材料和陶瓷/金属复合材料片层压在一起，切割成单个芯片，并烧结以将陶瓷烧结在一起。 复合材料可以包含足以使复合材料导电的金属量，由此复合材料可以用于一个或两个电极，并将电容器安装到印刷电路板上。 或者，复合材料可以含有不足以使复合材料导电但足以用作电镀工艺的种子点的金属量，其中复合材料优先涂覆有导电金属，并且涂覆的复合材料安装到印刷电路板和 涂层提供与内部电极的电连接。 提供垂直取向的表面贴装电容器和混合电容器。

公开(公告)号：US06587327B1

公开(公告)日：2003-07-01

申请号：US10150202

申请日：2002-05-17

Applicant: Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

Inventor： Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

IPC: H01G4228

CPC classification number: H01G4/30 ,  H01G4/228 ,  H01G4/38

Abstract: A monolithic capacitor structure includes at least first and second plates internal to a dielectric body, the plates extending inward from opposed conductive contacts on surfaces of the body, and forming capacitor(s) therebetween. A third plate extends within said body, electrically floating relative to the exterior contacts, and forming a capacitor with the first and second plates, and further forming a capacitor with additional conductive structures connected to the conductive contacts on the body. The resulting array of combined series and parallel capacitors formed by the third plate, in conjunction with the capacitor(s) formed by the first and second plates, provides effective wideband performance in an integrated, cost-effective structure.

Abstract translation: 单片电容器结构至少包括介电体内部的第一和第二板，所述板从主体表面上的相对的导电触点向内延伸，并且在它们之间形成电容器。 第三板在所述主体内延伸，相对于外部触头电浮动，以及与第一和第二板形成电容器，并进一步形成具有连接到主体上的导电触点的附加导电结构的电容器。 由第三板形成的所组合的串联和并联电容器阵列与由第一和第二板形成的电容器相结合，在集成的，具有成本效益的结构中提供了有效的宽带性能。

公开(公告)号：US06974516B2

公开(公告)日：2005-12-13

申请号：US10784445

申请日：2004-02-23

Applicant: Alan Devoe ,  Mary Trinh

Inventor： Alan Devoe ,  Mary Trinh

IPC: B28B21/48 ,  B32B1/08 ,  C03B29/00 ,  H01M8/00

CPC classification number: B28B21/48 ,  B32B1/08

Abstract: A method of fabricating a ceramic tube with electrodes thereon suitable for use as a tubular reaction chamber for a fuel cell. In one embodiment, the method includes wrapping a first electrode material around a mandrel, then wrapping a green ceramic material over the first electrode material, and then wrapping a second electrode material over the green ceramic material. The wrapped layers are laminated together, and then removed from the mandrel and sintered, in either sequence, to produce the laminated ceramic tube having an inner first electrode and an outer second electrode. Alternatively, a first electrode tube is provided in place of the mandrel and around which the green ceramic material is wrapped. The outer second electrode may be produced by wrapping a second electrode material around the green ceramic material, before or after laminating, or by printing the electrode material onto the sintered ceramic tube. The present invention further provides a method of making a ceramic tube in which a sacrificial organic material is first wrapped around the mandrel to a desired thickness prior to wrapping the green ceramic material to increase the green material thickness. During sintering, the organic material is burned away leaving only a laminated ceramic tube, optionally with electrodes thereon.

Abstract translation: 一种制造其上具有适合用作燃料电池的管状反应室的电极的陶瓷管的方法。 在一个实施例中，该方法包括围绕心轴缠绕第一电极材料，然后将生坯陶瓷材料缠绕在第一电极材料上，然后将第二电极材料缠绕在生陶瓷材料上。 将包裹的层层叠在一起，然后从心轴中取出并以任一顺序烧结，以制造具有内部第一电极和外部第二电极的层叠陶瓷管。 或者，提供第一电极管来代替心轴，并且围绕着该生坯陶瓷材料被包裹。 外部第二电极可以通过在层压之前或之后将绿色陶瓷材料周围缠绕第二电极材料，或通过将电极材料印刷到烧结陶瓷管上来制造。 本发明还提供一种制造陶瓷管的方法，其中在包裹生坯陶瓷材料之前首先将牺牲有机材料缠绕在心轴上至期望的厚度以增加生坯材料厚度。 在烧结期间，有机材料被烧掉，仅留下层压陶瓷管，任选地带有电极。

公开(公告)号：US09786437B1

公开(公告)日：2017-10-10

申请号：US12965557

申请日：2010-12-10

Applicant: Hung Van Trinh ,  Alan Devoe

Inventor： Hung Van Trinh ,  Alan Devoe

IPC: H01G4/35 ,  H01G4/012 ,  H01G4/005 ,  H01G4/30

CPC classification number: H01G4/35 ,  H01G4/005 ,  H01G4/012 ,  H01G4/232 ,  H01G4/30

Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers interposed within a dielectric laminate. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.

公开(公告)号：US06924967B1

公开(公告)日：2005-08-02

申请号：US10836888

申请日：2004-04-30

Applicant: Alan Devoe

Inventor： Alan Devoe

IPC: H01G2/06 ,  H01G4/232 ,  H01G4/30

CPC classification number: H01G4/232 ,  H01G2/065 ,  Y10T29/49172

Abstract: An interposer connector for connecting an interdigitated capacitor to a substrate having a first track to be electrically connected to first capacitor terminals and an opposed second track to be electrically connected to second capacitor terminals. The interposer connector supports the interdigitated capacitor and has a first electrical conductor electrically connectable to the first track and the first capacitor terminals and a second electrical conductor electrically connectable to the second track substrate and the second capacitor terminals.

Abstract translation: 一种用于将交错电容器连接到具有电连接到第一电容器端子的第一轨道和与第二电容器端子电连接的相对的第二轨道的衬底的插入器连接器。 插入器连接器支撑交错电容器，并且具有可电连接到第一轨道和第一电容器端子的第一电导体和可电连接到第二轨道衬底和第二电容器端子的第二电导体。

公开(公告)号：US20210207888A1

公开(公告)日：2021-07-08

申请号：US15986227

申请日：2018-05-22

Applicant: Alan Devoe

Inventor： Alan Devoe

IPC: F27D5/00 ,  B28B3/00 ,  B28B11/24

Abstract: A method of manufacturing a furnace setter is disclosed. The method includes placing one or more layers of ceramic tape on a form that has a shape corresponding to a desired shape of the furnace setter. The method further includes applying pressure to the assembly that includes the form and the tape layers. The application of pressure to the assembly compresses the ceramic tape layers together to generate an integrated body having the desired shape of the furnace setter. The method further includes removing the integrated body from the form and applying a heat treatment to the integrated body to generate the furnace setter as a sintered solid body. According to a further embodiment, a furnace setter is disclosed that has a weight to area ratio that is less than 10 g/in2, less than 5 g/in2, less than 3 g/in2, or less than 2 g/in2.

公开(公告)号：US08644000B2

公开(公告)日：2014-02-04

申请号：US13230926

申请日：2011-09-13

Applicant: Fatih Dogan ,  Alan Devoe ,  Ian Burn

Inventor： Fatih Dogan ,  Alan Devoe ,  Ian Burn

IPC: H01G4/30

CPC classification number: H01G4/30 ,  C04B35/46 ,  C04B35/6261 ,  C04B35/6455 ,  C04B2235/3206 ,  C04B2235/3239 ,  C04B2235/3251 ,  C04B2235/3256 ,  C04B2235/3258 ,  C04B2235/3262 ,  C04B2235/3272 ,  C04B2235/3275 ,  C04B2235/3279 ,  C04B2235/42 ,  C04B2235/441 ,  C04B2235/5409 ,  C04B2235/5454 ,  C04B2235/6025 ,  C04B2235/604 ,  C04B2235/6585 ,  C04B2235/661 ,  C04B2235/72 ,  C04B2235/725 ,  C04B2235/727 ,  C04B2235/785 ,  H01G4/0085 ,  H01G4/1218

Abstract: A multilayer ceramic capacitor, having a plurality of electrode layers and a plurality of substantially titanium dioxide dielectric layers, wherein each respective titanium dioxide dielectric layer is substantially free of porosity, wherein each respective substantially titanium dioxide dielectric layer is positioned between two respective electrode layers, wherein each respective substantially titanium dioxide dielectric layer has an average grain size of between about 200 and about 400 nanometers, wherein each respective substantially titanium dioxide dielectric layer has maximum particle size of less than about 500 nanometers. Typically, each respective substantially titanium dioxide dielectric layer further includes at least one dopant selected from the group including P, V, Nb, Ta, Mo, W, and combinations thereof, and the included dopant is typically present in amounts of less than about 0.01 atomic percent.

Abstract translation: 一种多层陶瓷电容器，具有多个电极层和多个基本上为二氧化钛的电介质层，其中每个相应的二氧化钛电介质层基本上没有孔隙率，其中每个相应的基本上二氧化钛介电层位于两个相应的电极层之间， 其中每个相应的基本上二氧化钛介电层的平均晶粒尺寸为约200至约400纳米，其中每个相应的基本上二氧化钛介电层具有小于约500纳米的最大粒度。 通常，每个相应的基本上二氧化钛介电层还包括选自P，V，Nb，Ta，Mo，W及其组合的至少一种掺杂剂，并且所包含的掺杂剂通常以小于约0.01的量存在 原子百分比。

公开(公告)号：US20130063858A1

公开(公告)日：2013-03-14

申请号：US13230926

申请日：2011-09-13

Applicant: Fatih Dogan ,  Alan Devoe ,  Ian Burn

Inventor： Fatih Dogan ,  Alan Devoe ,  Ian Burn

IPC: H01G4/30 ,  C04B35/64 ,  B82Y40/00

CPC classification number: H01G4/30 ,  C04B35/46 ,  C04B35/6261 ,  C04B35/6455 ,  C04B2235/3206 ,  C04B2235/3239 ,  C04B2235/3251 ,  C04B2235/3256 ,  C04B2235/3258 ,  C04B2235/3262 ,  C04B2235/3272 ,  C04B2235/3275 ,  C04B2235/3279 ,  C04B2235/42 ,  C04B2235/441 ,  C04B2235/5409 ,  C04B2235/5454 ,  C04B2235/6025 ,  C04B2235/604 ,  C04B2235/6585 ,  C04B2235/661 ,  C04B2235/72 ,  C04B2235/725 ,  C04B2235/727 ,  C04B2235/785 ,  H01G4/0085 ,  H01G4/1218

Abstract: A multilayer ceramic capacitor, having a plurality of electrode layers and a plurality of substantially titanium dioxide dielectric layers, wherein each respective titanium dioxide dielectric layer is substantially free of porosity, wherein each respective substantially titanium dioxide dielectric layer is positioned between two respective electrode layers, wherein each respective substantially titanium dioxide dielectric layer has an average grain size of between about 200 and about 400 nanometers, wherein each respective substantially titanium dioxide dielectric layer has maximum particle size of less than about 500 nanometers. Typically, each respective substantially titanium dioxide dielectric layer further includes at least one dopant selected from the group including P, V, Nb, Ta, Mo, W, and combinations thereof, and the included dopant is typically present in amounts of less than about 0.01 atomic percent.

Abstract translation: 一种多层陶瓷电容器，具有多个电极层和多个基本上为二氧化钛的电介质层，其中每个相应的二氧化钛电介质层基本上没有孔隙率，其中每个相应的基本上二氧化钛介电层位于两个相应的电极层之间， 其中每个相应的基本上二氧化钛介电层的平均晶粒尺寸为约200至约400纳米，其中每个相应的基本上二氧化钛介电层具有小于约500纳米的最大粒度。 通常，每个相应的基本上二氧化钛介电层还包括选自P，V，Nb，Ta，Mo，W及其组合的至少一种掺杂剂，并且所包含的掺杂剂通常以小于约0.01的量存在 原子百分比。

公开(公告)号：US20050000621A1

公开(公告)日：2005-01-06

申请号：US10784445

申请日：2004-02-23

Applicant: Alan Devoe ,  Mary Trinh

Inventor： Alan Devoe ,  Mary Trinh

IPC: B28B21/48 ,  B32B1/08 ,  C03B29/00

CPC classification number: B28B21/48 ,  B32B1/08

Abstract: A method of fabricating a ceramic tube with electrodes thereon suitable for use as a tubular reaction chamber for a fuel cell. In one embodiment, the method includes wrapping a first electrode material around a mandrel, then wrapping a green ceramic material over the first electrode material, and then wrapping a second electrode material over the green ceramic material. The wrapped layers are laminated together, and then removed from the mandrel and sintered, in either sequence, to produce the laminated ceramic tube having an inner first electrode and an outer second electrode. Alternatively, a first electrode tube is provided in place of the mandrel and around which the green ceramic material is wrapped. The outer second electrode may be produced by wrapping a second electrode material around the green ceramic material, before or after laminating, or by printing the electrode material onto the sintered ceramic tube. The present invention further provides a method of making a ceramic tube in which a sacrificial organic material is first wrapped around the mandrel to a desired thickness prior to wrapping the green ceramic material to increase the green material thickness. During sintering, the organic material is burned away leaving only a laminated ceramic tube, optionally with electrodes thereon.

公开(公告)号：US06690558B1

公开(公告)日：2004-02-10

申请号：US10047588

申请日：2002-01-14

Applicant: Alan Devoe ,  Daniel Devoe

Inventor： Alan Devoe ,  Daniel Devoe

IPC: H02H900

CPC classification number: H01C1/148 ,  H01C7/18 ,  H01C17/006 ,  H01C17/28

Abstract: A high power resistor device and method for making a high power resistor device. A resistor is formed on a first end of a fired, ceramic chip with multiple internal conductor electrodes, and end terminations are then applied to both ends of the chip. A power resistor device having a high power rating is thus provided having buried conductor electrodes electrically connected to end terminations, where the connection at the first end is through the resistor to form a power resistor structured to dissipate heat efficiently. In an alternative method of the present invention, both ends of the chip may be dipped in resistor paste to form resistors on both ends of the chip. In yet another alternative method of the present invention, a conductor under-layer is formed under the resistor, such as by first dipping the end of the chip in a conductor paste and firing the chip.

Abstract translation: 一种用于制造高功率电阻器件的高功率电阻器件和方法。 在具有多个内部导体电极的烧制陶瓷芯片的第一端上形成电阻器，然后将端接端子施加到芯片的两端。 因此，提供具有高功率额定值的功率电阻器件，其具有电连接到端部端子的掩埋导体电极，其中第一端处的连接通过电阻器以形成有效地散热的功率电阻器。 在本发明的替代方法中，芯片的两端可以浸入电阻浆料中以在芯片的两端形成电阻器。 在本发明的另一种替代方法中，在电阻器的下方形成导体底层，例如首先将芯片的端部浸入导体糊料中并烧制芯片。