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183 条记录 (耗时 0.082 秒)

    Generic non-volatile service layer
    112.
    发明授权
    Generic non-volatile service layer 有权
    通用非易失性服务层

    公开(公告)号：US07966581B2

    公开(公告)日：2011-06-21

    申请号：US12252564

    申请日：2008-10-16

    申请人： Yiran Chen ,  Dadi Setiadi ,  Hai Li ,  Haiwen Xi ,  Hongyue Liu

    发明人： Yiran Chen ,  Dadi Setiadi ,  Hai Li ,  Haiwen Xi ,  Hongyue Liu

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045 ,  G06F2217/14

    摘要： Method and apparatus for constructing and operating an integrated circuit in an electronic device. In some embodiments, a generic service layer is integrated in a three dimensional integrated circuit and tested using a testing pattern stored in a non-volatile memory. The generic service layer is reconfigured to a permanent non-testing functional component of the integrated circuit.

    摘要翻译： 在电子设备中构建和操作集成电路的方法和装置。 在一些实施例中，通用服务层集成在三维集成电路中，并使用存储在非易失性存储器中的测试模式进行测试。 通用服务层被重新配置为集成电路的永久性非测试功能组件。

    VARIABLE WRITE AND READ METHODS FOR RESISTIVE RANDOM ACCESS MEMORY
    113.
    发明申请
    VARIABLE WRITE AND READ METHODS FOR RESISTIVE RANDOM ACCESS MEMORY 失效
    用于电阻随机访问存储器的可变写入和读取方法

    公开(公告)号：US20110134682A1

    公开(公告)日：2011-06-09

    申请号：US13028246

    申请日：2011-02-16

    申请人： Haiwen Xi ,  Hongyue Liu ,  Xiaobin Wang ,  Yong Lu ,  Yiran Chen ,  Yuankai Zheng ,  Dimitar V. Dimitrov ,  Dexin Wang ,  Hai Li

    发明人： Haiwen Xi ,  Hongyue Liu ,  Xiaobin Wang ,  Yong Lu ,  Yiran Chen ,  Yuankai Zheng ,  Dimitar V. Dimitrov ,  Dexin Wang ,  Hai Li

    IPC分类号： G11C11/00

    CPC分类号： G11C11/16 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0057

    摘要： Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.

    摘要翻译： 公开了用于电阻随机存取存储器（RRAM）的可变写和读方法。 这些方法包括初始化写入序列并验证RRAM单元的电阻状态。 如果需要写入脉冲，则通过RRAM单元施加两个或更多写入脉冲，以将期望的数据状态写入RRAM单元。 每个后续写入脉冲具有基本上相同或更大的写入脉冲持续时间。 随后的写入脉冲被施加到RRAM单元，直到RRAM单元处于期望的数据状态，或直到预定数量的写入脉冲已经被施加到RRAM单元为止。 还公开了一种读取方法，其中随后的读取脉冲通过RRAM单元被施加，直到读取成功或直到预定数量的读取脉冲已经被应用于RRAM单元为止。

    Resistive sense memory array with partial block update capability
    115.
    发明授权
    Resistive sense memory array with partial block update capability 有权
    具有部分块更新能力的电阻式存储阵列

    公开(公告)号：US07944731B2

    公开(公告)日：2011-05-17

    申请号：US12904653

    申请日：2010-10-14

    申请人： Yiran Chen ,  Daniel S. Reed ,  Yong Lu ,  Harry Hongyue Liu ,  Hai Li

    发明人： Yiran Chen ,  Daniel S. Reed ,  Yong Lu ,  Harry Hongyue Liu ,  Hai Li

    IPC分类号： G11C11/00

    CPC分类号： G11C8/12 ,  G11C11/1653 ,  G11C11/1673 ,  G11C11/1675 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0088 ,  G11C2013/009 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/79

    摘要： Various embodiments of the present invention are generally directed to a method and apparatus for carrying out a partial block update operation upon a resistive sense memory (RSM) array, such as formed from STRAM or RRAM cells. The RSM array is arranged into multi-cell blocks (sectors), each block having a physical block address (PBA). A first set of user data is written to a selected block at a first PBA. A partial block update operation is performed by writing a second set of user data to a second block at a second PBA, the second set of user data updating a portion of the first set of user data in the first PBA. The first and second blocks are thereafter read to retrieve the second set of user data and a remaining portion of the first set of user data.

    摘要翻译： 本发明的各种实施例总体上涉及一种用于在诸如由STRAM或RRAM单元形成的电阻式感测存储器（RSM）阵列上执行部分块更新操作的方法和装置。 RSM阵列被布置成多小区块（扇区），每个块具有物理块地址（PBA）。 第一组用户数据在第一PBA被写入所选择的块。 通过在第二PBA将第二组用户数据写入第二块来执行部分块更新操作，第二组用户数据更新第一PBA中第一组用户数据的一部分。 然后读取第一和第二块以检索第二组用户数据和第一组用户数据的剩余部分。

    MRAM diode array and access method
    116.
    发明授权
    MRAM diode array and access method 有权
    MRAM二极管阵列和访问方式

    公开(公告)号：US07936580B2

    公开(公告)日：2011-05-03

    申请号：US12254414

    申请日：2008-10-20

    申请人： Yiran Chen ,  Hai Li ,  Hongyue Liu ,  Yong Lu ,  Song S. Xue

    发明人： Yiran Chen ,  Hai Li ,  Hongyue Liu ,  Yong Lu ,  Song S. Xue

    IPC分类号： G11C5/08 ,  G11C27/00 ,  G11C11/00 ,  G11C7/00

    CPC分类号： G11C11/1675 ,  G11C11/1659

    摘要： A memory unit includes a magnetic tunnel junction data cell is electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a write current through the magnetic tunnel junction data cell. A first diode is electrically between the magnetic tunnel junction data cell and the source line and a second diode is electrically between the magnetic tunnel junction data cell and the source line. The first diode and second diode are in parallel electrical connection, and having opposing forward bias directions.

    摘要翻译： 存储单元包括磁性隧道结数据单元电耦合到位线和源极线。 磁隧道结数据单元被配置为通过使写入电流通过磁性隧道结数据单元而在高电阻状态和低电阻状态之间切换。 第一二极管电磁性地在磁性隧道结数据单元和源极线之间，第二个二极管电气地在磁性隧道结数据单元和源极线之间。 第一二极管和第二二极管并联电连接并具有相反的正向偏压方向。

    Voltage reference generation for resistive sense memory cells
    118.
    发明授权
    Voltage reference generation for resistive sense memory cells 有权
    电阻读出单元的电压参考生成

    公开(公告)号：US07881094B2

    公开(公告)日：2011-02-01

    申请号：US12269598

    申请日：2008-11-12

    申请人： Yiran Chen ,  Hai Li ,  Harry Hongyue Liu ,  KangYong Kim ,  Henry F. Huang

    发明人： Yiran Chen ,  Hai Li ,  Harry Hongyue Liu ,  KangYong Kim ,  Henry F. Huang

    IPC分类号： G11C11/00

    CPC分类号： G11C13/004 ,  G11C5/147 ,  G11C7/14 ,  G11C11/1659 ,  G11C11/1673 ,  G11C13/0038

    摘要： Various embodiments of the present invention are generally directed to an apparatus and associated method for generating a reference voltage for a resistive sense memory (RSM) cell, such as an STRAM cell. A dummy reference cell used to generate a reference voltage to sense a resistive state of an adjacent RSM cell. The dummy reference cell comprises a switching device, a resistive sense element (RSE) programmed to a selected resistive state, and a dummy resistor coupled to the RSE. A magnitude of the reference voltage is set in relation to the selected resistive state of the RSE and the resistance of the dummy resistor.

    摘要翻译： 本发明的各种实施例一般涉及一种用于为诸如STRAM单元的电阻式感测存储器（RSM）单元产生参考电压的装置和相关联的方法。 用于产生参考电压以感测相邻RSM单元的电阻状态的虚拟参考单元。 虚拟参考单元包括开关装置，被编程为选择的电阻状态的电阻感测元件（RSE）和耦合到RSE的虚拟电阻。 参考电压的大小相对于RSE的选定电阻状态和虚拟电阻器的电阻设定。

    Variable write and read methods for resistive random access memory
    119.
    发明授权
    Variable write and read methods for resistive random access memory 有权
    电阻随机存取存储器的可变写和读方法

    公开(公告)号：US07826255B2

    公开(公告)日：2010-11-02

    申请号：US12210526

    申请日：2008-09-15

    申请人： Haiwen Xi ,  Hongyue Liu ,  Xiaobin Wang ,  Yong Lu ,  Yiran Chen ,  Yuankai Zheng ,  Dimitar V. Dimitrov ,  Dexin Wang ,  Hai Li

    发明人： Haiwen Xi ,  Hongyue Liu ,  Xiaobin Wang ,  Yong Lu ,  Yiran Chen ,  Yuankai Zheng ,  Dimitar V. Dimitrov ,  Dexin Wang ,  Hai Li

    IPC分类号： G11C11/00 ,  G11C11/14

    CPC分类号： G11C11/16 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0057

    摘要： Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.

    摘要翻译： 公开了用于电阻随机存取存储器（RRAM）的可变写和读方法。 这些方法包括初始化写入序列并验证RRAM单元的电阻状态。 如果需要写入脉冲，则通过RRAM单元施加两个或更多写入脉冲，以将期望的数据状态写入RRAM单元。 每个后续写入脉冲具有基本上相同或更大的写入脉冲持续时间。 随后的写入脉冲被施加到RRAM单元，直到RRAM单元处于期望的数据状态，或直到预定数量的写入脉冲已经被施加到RRAM单元为止。 还公开了一种读取方法，其中随后的读取脉冲通过RRAM单元被施加，直到读取成功或直到预定数量的读取脉冲已经被应用于RRAM单元为止。