公开(公告)号：US20050164671A1

公开(公告)日：2005-07-28

申请号：US11084930

申请日：2005-03-21

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H03D7/14 ,  H03F1/26 ,  H03F3/45 ,  H04B1/26 ,  H04B1/28

CPC classification number: H03F1/26 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03F3/45183 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45362

Abstract: A mixer is disclosed that includes first and second transconductance modules that, in one embodiment, includes MOSFETs configured to receive a plurality of signals that are to be mixed and a selectively coupled auxiliary current source to inject an auxiliary current into the second transconductance module approximately at or near a zero-crossing point in order to reduce flicker noise and other noise introduced into an output signal during switching. Accordingly, as a first transconductance module approaches a zero-crossing, auxiliary current is injected to reduce the current produced therefrom thereby reducing flicker noise. In a differential mixer, the amount of current produced from a transistor pair to which the signal cycle is being switched is also reduced thereby reducing noise from the transistor pair that is turning on for the next portion of a signal cycle.

公开(公告)号：US06862438B2

公开(公告)日：2005-03-01

申请号：US10138602

申请日：2002-05-03

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H03G3/30 ,  H04B1/40 ,  H04B17/00

CPC classification number: H03G3/3052 ,  H04B1/406

Abstract: A method and apparatus for dynamically controlling a programmable gain amplifier (PGA) to provide a plurality of gain steps thereby providing automatic gain control (AGC) in a receiver intermediate frequency (IF) stage comprising a succession of operational amplifiers wherein at least one is for providing fine gain control and wherein the gain of each fine gain amplifier is controlled by the resistance ratios of a plurality of selectively biased MOSFETs. In one embodiment of the invention, three coarse amplifiers are provided, each having a gain of either 0 dB or 12 dB based on the value of a two-state signal provided to each amplifier gain control input. A single fine gain amplifier has a gain of 0 dB, 3 dB, 6 dB or 9 dB based on the binary value of the two-bit signal provided to the amplifier. The combination of three coarse gain amplifiers and one fine gain amplifier provides for a total gain of 45 dB in 3 dB steps in the described embodiment of the invention. The output of the gain control circuitry also is fed into an inverter. The inverter output may be used as a received signal strength indicator for a desired signal.

Abstract translation: 一种用于动态地控制可编程增益放大器（PGA）以提供多个增益步骤的方法和装置，从而在包括一系列运算放大器的接收器中频（IF）级中提供自动增益控制（AGC），其中至少一个用于 提供精细增益控制，并且其中每个细增益放大器的增益由多个选择性偏置的MOSFET的电阻比来控制。 在本发明的一个实施例中，提供了三个粗放大器，每个粗放大器基于提供给每个放大器增益控制输入的两状态信号的值，分别具有0dB或12dB的增益。 基于提供给放大器的2位信号的二进制值，单个细增益放大器的增益为0dB，3dB，6dB或9dB。 在本发明的所描述的实施例中，三个粗增益放大器和一个精细增益放大器的组合以3dB的步长提供45dB的总增益。 增益控制电路的输出也被馈送到逆变器。 逆变器输出可以用作所需信号的接收信号强度指示符。

公开(公告)号：US06845232B2

公开(公告)日：2005-01-18

申请号：US10138675

申请日：2002-05-03

Applicant: Hooman Darabi

Inventor： Hooman Darabi

IPC: H03G3/30 ,  H04B1/06

CPC classification number: H03G3/3052

Abstract: A receiver portion of a radio includes an analog circuit for determining a peak amplitude in a way that eliminates or reduces the effects of frequency errors that are introduced by crystals within filters and other devices. A voltage follower and a current mirror in which a MOSFET coupled to an output node produces a voltage across its gate to source terminals whose value is a function of a sum of the gate to source voltages of two MOSFET devices that receive a logarithm of an I modulated channel and a logarithm of a Q modulated channel, respectively.

Abstract translation: 无线电装置的接收机部分包括用于以消除或减少由晶体在滤波器和其它装置中引入的频率误差的影响的方式确定峰值振幅的模拟电路。 电压跟随器和电流镜，其中耦合到输出节点的MOSFET产生跨越其栅极至源极端子的电压，其值是接收I的对数的两个MOSFET器件的栅极至源极电压之和的函数 调制信道和Q调制信道的对数。

公开(公告)号：US09154166B2

公开(公告)日：2015-10-06

申请号：US13075599

申请日：2011-03-30

Applicant: Hooman Darabi ,  Ahmadreza (Reza) Rofougaran

Inventor： Hooman Darabi ,  Ahmadreza (Reza) Rofougaran

IPC: H04M1/00 ,  H04B1/00 ,  H04B1/52

CPC classification number: H04B1/005 ,  H04B1/52

Abstract: A wireless communication device includes a front-end module (FEM) network coupled to a system on a chip (SOC) via an RF connection. The FEM network includes a plurality of FEMs, wherein, when activated, one or more of the plurality of FEMs is operable to: output an outbound RF signal to one or more antennas; receive an inbound RF signal from the one or more antennas; and isolate the inbound RF signal from the outbound RF signal. The SOC is operable to activate the one or more of the plurality of FEMs; convert outbound data into the outbound RF signal; and convert the inbound RF signal into inbound data.

Abstract translation: 无线通信设备包括经由RF连接耦合到芯片上的系统（SOC）的前端模块（FEM）网络。 FEM网络包括多个FEM，其中当被激活时，多个FEM中的一个或多个可操作地：将出站RF信号输出到一个或多个天线; 从所述一个或多个天线接收入站RF信号; 并将入站RF信号与出站RF信号隔离开来。 SOC可操作以激活多个FEM中的一个或多个; 将出站数据转换为出站RF信号; 并将入站RF信号转换为入站数据。

公开(公告)号：US08929844B2

公开(公告)日：2015-01-06

申请号：US12807210

申请日：2010-08-30

Applicant: Ahmad Mirzaei ,  Hooman Darabi

Inventor： Ahmad Mirzaei ,  Hooman Darabi

IPC: H04B1/04 ,  H01F27/42 ,  H03F3/21 ,  H03F3/24

CPC classification number: H01F27/42 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/537

Abstract: According to one embodiment, a variable gain control transformer comprises a primary winding connected to differential inputs of the variable gain control transformer, a secondary winding for providing a single ended output to a load, and an output control circuit coupled to the secondary winding, the output control circuit configured to provide up to approximately 12 dB of gain control. Variable gain control may be achieved using first and second variable resistors of the output control circuit, wherein the first and second variable resistors are implemented by respective first and second pluralities of source-drain resistances produced by respective corresponding first and second pluralities of selectable field-effect transistors (FETs). In one embodiment, the variable gain control transformer further comprises a variable capacitance tuning circuit coupled between the differential inputs, the variable capacitance tuning circuit implemented using a plurality of selectable fixed capacitance unit cells.

Abstract translation: 根据一个实施例，可变增益控制变压器包括连接到可变增益控制变压器的差分输入的初级绕组，用于向负载提供单端输出的次级绕组和耦合到次级绕组的输出控制电路， 输出控制电路被配置为提供高达约12dB的增益控制。 可以通过输出控制电路的第一和第二可变电阻器实现可变增益控制，其中第一和第二可变电阻器由相应的第一和第二多个可选择的场 - 效应晶体管（FET）。 在一个实施例中，可变增益控制变压器还包括耦合在差分输入之间的可变电容调谐电路，使用多个可选择的固定电容单位单元实现的可变电容调谐电路。

公开(公告)号：US08886147B2

公开(公告)日：2014-11-11

申请号：US12804396

申请日：2010-07-20

Applicant: Mohyee Mikhemar ,  Hooman Darabi

Inventor： Mohyee Mikhemar ,  Hooman Darabi

IPC: H04B1/16 ,  H04B1/18 ,  H03F1/22 ,  H03F1/56 ,  H03F3/193

CPC classification number: H04B1/18 ,  H03F1/223 ,  H03F1/565 ,  H03F3/193 ,  H03F2200/222 ,  H03F2200/294

Abstract: According to one embodiment, a concurrent impedance and noise matching transconductance amplifier designed for implementation in a receiver comprises an input device configured to couple to a matching network of the receiver, and a boost capacitor connected to the input device to increase an input capacitance of the transconductance amplifier. The boost capacitor is selected to substantially minimize the receiver noise and to enable the concurrent impedance and noise matching of the receiver and the matching network. In one embodiment, the receiver comprises the transconductance amplifier to provide an amplified receive signal, and a mixer to produce a down-converted signal corresponding to the amplified receive signal, wherein the mixer is coupled to the transconductance amplifier by a blocking capacitor. The blocking capacitor is selected to substantially increase an amplitude ratio of the down-converted signal to the amplified receive signal to substantially increase the front-end gain of the receiver.

Abstract translation: 根据一个实施例，设计用于在接收机中实现的并发阻抗和噪声匹配跨导放大器包括被配置为耦合到接收器的匹配网络的输入设备和连接到输入设备的升压电容器，以增加输入设备的输入电容 跨导放大器 升压电容器被选择为基本上最小化接收器噪声并且使得接收器和匹配网络的并发阻抗和噪声匹配成为可能。 在一个实施例中，接收机包括跨导放大器以提供放大的接收信号，以及混频器以产生对应于放大的接收信号的下变频信号，其中混频器通过阻塞电容器耦合到跨导放大器。 选择阻塞电容器以大大增加经降频转换的信号与放大的接收信号的幅度比，以显着增加接收机的前端增益。

公开(公告)号：US08867591B2

公开(公告)日：2014-10-21

申请号：US13248562

申请日：2011-09-29

Applicant: Ahmadreza (Reza) Rofougaran ,  Hooman Darabi

Inventor： Ahmadreza (Reza) Rofougaran ,  Hooman Darabi

IPC: H04B1/38 ,  H04B1/00

CPC classification number: H04B1/001 ,  H03H19/00 ,  H03H2015/007 ,  H04B1/0028

Abstract: A discrete digital transceiver includes a receiver sample and hold module, a discrete digital receiver conversion module, a transmitter sample and hold module, a discrete digital transmitter conversion module, clock generation module, and a processing module. The receiver sample and hold module samples and holds an inbound wireless signal in accordance with a receiver S&H clock signal. The discrete digital receiver conversion module converts the receiver frequency domain sample pulse train into an inbound baseband signal. The transmitter sample and hold module samples and holds an outbound signal to produce a transmitter frequency domain sample pulse train. The discrete digital transmitter conversion module converts a transmitter frequency domain sample pulse train into the outbound wireless signal. The clock generation module generates S&H clock signals in accordance with a control signal. The processing module generates the control signal such that the S&H clock signals are shifted.

Abstract translation: 分立数字收发器包括接收机采样和保持模块，离散数字接收机转换模块，发射机采样和保持模块，分立数字发射机转换模块，时钟生成模块和处理模块。 接收机采样和保持模块根据接收机S＆H时钟信号采样并保存入站无线信号。 离散数字接收机转换模块将接收机频域采样脉冲串转换成入站基带信号。 发射机采样和保持模块采样并保存出站信号以产生发射机频域采样脉冲序列。 离散数字发射机转换模块将发射机频域采样脉冲串转换为出站无线信号。 时钟生成模块根据控制信号生成S＆H时钟信号。 处理模块产生控制信号，使得S＆H时钟信号被移位。

公开(公告)号：US08862064B2

公开(公告)日：2014-10-14

申请号：US12924353

申请日：2010-09-24

Applicant: Masoud Kahrizi ,  Zhimin Zhou ,  Hooman Darabi

Inventor： Masoud Kahrizi ,  Zhimin Zhou ,  Hooman Darabi

IPC: H04B17/00

CPC classification number: H04B17/0027 ,  H04B17/13 ,  H04B17/19

Abstract: A self-testing transceiver comprises a receiver, and a transmitter including a power amplifier (PA) and a plurality of transmitter pre-PA stages. The plurality of transmitter pre-PA stages are configured to generate a communication signal at a receive frequency of the transceiver and the receiver is configured to process another communication signal at a transmit frequency of the transceiver, thereby enabling transceiver self-testing. A method for use by a transceiver for self-testing comprises generating a first communication signal at a transmit frequency of the transceiver by a transmitter of the transceiver, processing the first communication signal by a receiver of the transceiver, generating a second communication signal at a receive frequency of the transceiver by the transmitter, and processing the second communication signal by the receiver. The described generating and processing of the first and second communication signals resulting in self-testing by the transceiver.

Abstract translation: 自检收发器包括接收器和包括功率放大器（PA）和多个发射器预PA级的发射器。 多个发射器预PA级被配置为以收发器的接收频率生成通信信号，并且接收器被配置为以收发器的发射频率处理另一通信信号，由此使能收发器自检。 收发信机用于自检的方法包括：通过收发信机的发射机在收发信机的发射频率下生成第一通信信号，由收发信机的接收机处理第一通信信号，产生第二通信信号 由发射机接收收发信机的频率，并由接收机处理第二通信信号。 所描述的第一和第二通信信号的产生和处理导致收发器的自检。

公开(公告)号：US08838028B2

公开(公告)日：2014-09-16

申请号：US13049566

申请日：2011-03-16

Applicant: Ahmadreza (Reza) Rofougaran ,  Maryam Rofougaran ,  Hooman Darabi ,  Vafa James Rakshani ,  Claude G. Hayek

Inventor： Ahmadreza (Reza) Rofougaran ,  Maryam Rofougaran ,  Hooman Darabi ,  Vafa James Rakshani ,  Claude G. Hayek

IPC: H04B7/00 ,  H04B1/40

CPC classification number: H04B1/406

Abstract: An RFIC includes an RF section, a memory interface, a display interface, an audio codec, a bus matrix, and a processing unit. The RF section converts a first inbound RF signal into a first inbound symbol stream and converts a second inbound RF signal into a second inbound symbol stream. The memory interface is operably coupled to retrieve a video file from memory and the display interface is operable to provide video data to a display. The audio codec converts an output digital signal into an output voice signal. The processing unit converts the first inbound symbol stream into streaming video data; converts the second inbound symbol stream into the output digital signal; and facilitates providing, via the bus matrix, at least one of: the video file to the display interface as the video data; the streaming video data to the display interface as the video data; and the digital output signal to the audio codec.

Abstract translation: RFIC包括RF部分，存储器接口，显示接口，音频编解码器，总线矩阵和处理单元。 RF部分将第一入站RF信号转换成第一入站符号流，并将第二入站RF信号转换成第二入站符号流。 存储器接口可操作地耦合以从存储器检索视频文件，并且显示接口可操作以向显示器提供视频数据。 音频编解码器将输出数字信号转换为输出语音信号。 处理单元将第一入站符号流转换为流视频数据; 将第二入站符号流转换成输出数字信号; 并且有助于经由总线矩阵将视频文件中的至少一个作为视频数据提供给显示接口; 将视频数据流传输到显示接口作为视频数据; 和数字输出信号到音频编解码器。

公开(公告)号：US08792836B2

公开(公告)日：2014-07-29

申请号：US12946688

申请日：2010-11-15

Applicant: Mohyee Mikhemar ,  Hooman Darabi

Inventor： Mohyee Mikhemar ,  Hooman Darabi

IPC: H04B1/44 ,  H04B1/46

CPC classification number: H04B1/582 ,  H04B1/0458 ,  H04B1/48

Abstract: A front end module includes a duplexer and a balancing network. The duplexer includes a compensation circuit and a transformer three windings having five nodes. The first node for operably coupling an antenna to the first winding; the second node operable to receive an outbound wireless signal and operably couples the first winding to the second winding; the third node operably couples the second winding to a balancing network; the fourth node operably coupled to output a first signal component corresponding to an inbound wireless signal from the third winding; and the fifth node operably coupled to output a second signal component corresponding to an inbound wireless signal from the third winding. The duplexer provides electrical isolation between the first and second signal components and the outbound wireless signal. The compensation module is operable to compensate the electrical isolation between the first and second signals and the outbound wireless signal.

Abstract translation: 前端模块包括双工器和平衡网络。 双工器包括补偿电路和变压器三个具有五个节点的绕组。 用于将天线可操作地耦合到第一绕组的第一节点; 所述第二节点可操作以接收出站无线信号并将所述第一绕组可操作地耦合到所述第二绕组; 第三节点将第二绕组可操作地耦合到平衡网络; 所述第四节点可操作地耦合以输出对应于来自所述第三绕组的入站无线信号的第一信号分量; 并且第五节点可操作地耦合以输出对应于来自第三绕组的入站无线信号的第二信号分量。 双工器提供第一和第二信号分量与出站无线信号之间的电气隔离。 补偿模块可用于补偿第一和第二信号与出站无线信号之间的电隔离。