公开(公告)号：US20140375620A1

公开(公告)日：2014-12-25

申请号：US14054853

申请日：2013-10-16

Applicant: Novatek Microelectronics Corp.

Inventor： Cheng-Hung Chen ,  Jen-Chieh Hu ,  Ju-Lin Huang ,  Yi-Chuan Liu ,  Jhih-Siou Cheng

IPC: G09G3/36

CPC classification number: G09G3/3685 ,  G09G3/20 ,  G09G2310/0275 ,  G09G2320/041 ,  G09G2330/045

Abstract: A display apparatus and a source driver thereof are disclosed. The source driver includes a temperature sensor and a power switch. The temperature sensor is configured to measure a first working temperature of the source driver, and generate an over-temperature protection enable signal by comparing the first working temperature with a preset temperature. The power switch is coupled to a power transmission path for a core circuit of the source driver to receive an operating power, and configured to turn on or cut off the power transmission path according to the over-temperature protection enable signal.

Abstract translation: 公开了一种显示装置及其源驱动器。 源驱动器包括温度传感器和电源开关。 温度传感器被配置为测量源极驱动器的第一工作温度，并且通过将第一工作温度与预设温度进行比较来产生过温保护使能信号。 电源开关耦合到用于源极驱动器的核心电路的电力传输路径以接收工作电力，并且被配置为根据过温度保护使能信号接通或切断电力传输路径。

公开(公告)号：US08823440B2

公开(公告)日：2014-09-02

申请号：US13792245

申请日：2013-03-11

Applicant: Novatek Microelectronics Corp.

Inventor： Cheng-Hung Chen ,  Ju-Lin Huang ,  Keko-Chun Liang

IPC: H03L5/00

CPC classification number: H03K3/012 ,  H03K3/356182

Abstract: A level shifting circuit with dynamic control includes a dynamic controller and a level shifter. The dynamic controller outputs a dynamic voltage and an output data signal. The level shifter under control by the dynamic controller includes an input signal receiver, an output signal generator, and a bias current controller, which are coupled in series between a ground voltage and a high level voltage. The input signal receiver receives the output data signal of the dynamic controller and the output signal generator produces a level-shifted data signal according to the input data signal. The bias current controller controlled by the dynamic voltage is at a first current-output capability when the level-shifted data signal is at a stable stage and at a second current-output capability when the level-shifted data signal is at an unstable stage. The first current-output capability is greater than the second current-output capability.

Abstract translation: 具有动态控制的电平移动电路包括动态控制器和电平转换器。 动态控制器输出动态电压和输出数据信号。 由动态控制器控制的电平移位器包括输入信号接收器，输出信号发生器和偏置电流控制器，它们串联在接地电压和高电平电压之间。 输入信号接收器接收动态控制器的输出数据信号，输出信号发生器根据输入数据信号产生电平移位数据信号。 当电平移位数据信号处于不稳定阶段时，当电平移位数据信号处于稳定级并处于第二电流输出能力时，由动态电压控制的偏置电流控制器处于第一电流输出能力。 第一个电流输出能力大于第二个电流输出能力。

公开(公告)号：US20140139270A1

公开(公告)日：2014-05-22

申请号：US13928376

申请日：2013-06-26

Applicant: Novatek Microelectronics Corp.

Inventor： Ju-Lin Huang ,  Jhih-Siou Cheng ,  Chun-Yung Cho ,  Chieh-An Lin

IPC: H03K3/011

CPC classification number: G09G3/00 ,  G09G2300/0838 ,  G09G2300/0871 ,  G09G2310/0213 ,  G09G2310/0289 ,  G09G2330/045

Abstract: A panel driver integrated circuit (IC) and a cooling method of the panel driver IC are provided. The panel driver IC includes a data encoder, a level shifter, a Digital-to-Analog Converter (DAC), a rearrangement circuit and an output buffer. The data encoder receives and selectively changes an original data for outputting to the level shifter. An input terminal and an output terminal of the level shifter are coupled to an output terminal of the data encoder and a data input terminal of the DAC, respectively. The output terminals of the rearrangement circuit are respectively coupled to the reference voltage input terminals of the DAC for providing different reference voltages. The rearrangement circuit correspondingly rearranges the order of the reference voltages according to the operation of the data encoder. An input terminal of the output buffer is coupled to an output terminal of the DAC.

Abstract translation: 提供面板驱动器集成电路（IC）和面板驱动器IC的冷却方法。 面板驱动器IC包括数据编码器，电平转换器，数模转换器（DAC），重排电路和输出缓冲器。 数据编码器接收并选择性地改变用于输出到电平移位器的原始数据。 电平移位器的输入端子和输出端子分别耦合到数据编码器的输出端子和DAC的数据输入端子。 重排电路的输出端分别耦合到DAC的参考电压输入端，以提供不同的参考电压。 重排电路根据数据编码器的操作相应地重新排列参考电压的顺序。 输出缓冲器的输入端耦合到DAC的输出端。

公开(公告)号：US20140133058A1

公开(公告)日：2014-05-15

申请号：US13865210

申请日：2013-04-18

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Ju-Lin Huang ,  Che-Lun Hsu ,  Jhih-Siou Cheng ,  Chun-Yung Cho

IPC: H02H9/02

CPC classification number: H02H9/046 ,  G09G3/20 ,  G09G2310/027 ,  G09G2320/0276 ,  G09G2330/028 ,  G09G2330/04 ,  G09G2330/06 ,  H03M1/00 ,  H03M1/0827 ,  H03M1/808

Abstract: A driving circuit includes several first electrostatic current limiting resistors and several digital to analog converter (DAC) units. First ends of these first electrostatic current limiting resistors common coupled to a global path to receive a reference voltage. These DAC units respectively coupled to second ends of the first electrostatic current limiting resistors one-on-one to receive the reference voltage through the first electrostatic current limiting resistors.

Abstract translation: 驱动电路包括几个第一静电电流限制电阻器和几个数模转换器（DAC）单元。 这些第一静电电流限制电阻的第一端公共耦合到全局路径以接收参考电压。 这些DAC单元分别耦合到第一静电电流限制电阻器的第二端，以通过第一静电电流限制电阻器接收参考电压。

公开(公告)号：US20140009506A1

公开(公告)日：2014-01-09

申请号：US13740282

申请日：2013-01-14

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Jhih-Siou Cheng ,  Ju-Lin Huang ,  Pang-Chan Hung

IPC: H03M1/66 ,  H03K3/01

CPC classification number: H03M1/76 ,  G09G3/2007 ,  G09G3/3291 ,  G09G3/3696 ,  G09G5/02 ,  G09G2310/027 ,  G09G2320/0276 ,  G09G2330/028 ,  H03K3/01 ,  H03M1/66 ,  H03M1/765

Abstract: A digital to analog converter is disclosed. The digital to analog converter includes a voltage selector, M voltage transmitting switches and a selecting signal decoder. The voltage selector receives N first voltages among a plurality of analog input voltages, and receives a plurality of digital selecting signals. The voltage selector selects at most one of the first voltages for providing to an output terminal. One terminals of the voltage transmitting switches receives M second voltages among the input voltages respectively, and the voltage transmitting switches are turned on or off according to M transmitting enable signals respectively. The selecting signal decoder generates the transmitting enable signals according to the selecting signals. Wherein, M and N are positive integers.

Abstract translation: 公开了一种数模转换器。 数模转换器包括电压选择器，M电压发射开关和选择信号解码器。 电压选择器在多个模拟输入电压中接收N个第一电压，并接收多个数字选择信号。 电压选择器选择用于提供给输出端的第一电压中的至少一个。 电压发送开关的一个端子分别在输入电压之间接收M个第二电压，并且电压发送开关分别根据M个发送使能信号导通或关断。 选择信号解码器根据选择信号产生发送使能信号。 其中，M和N是正整数。