公开(公告)号：US11115683B2

公开(公告)日：2021-09-07

申请号：US16432317

申请日：2019-06-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mihir Narendra Mody ,  Chaitanya S. Ghone ,  Joseph Meehan

IPC: H04N19/86 ,  H04N19/82 ,  H04N19/42 ,  H04N19/44

Abstract: A video decoder system, in one embodiment, includes one or more processors and a memory storing instructions that when executed by the one or more processors cause the video decoding system to perform an entropy decoding operation in a frame level pipelined manner on a bitstream representative of encoded video data to produce first output data, perform at least one of an inverse quantization operation or an inverse frequency transform operation in a row level pipelined manner on the first output data to produce second output data, perform a deblocking filtering operation on first input data that includes the second output data in a row level pipelined manner to produce third output data, and output a decoded video output based on the third output data.

公开(公告)号：US20210263883A1

公开(公告)日：2021-08-26

申请号：US17314313

申请日：2021-05-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason A.T. Jones ,  Sriramakrishnan Govindarajan ,  Mihir Narendra Mody ,  Kishon Vijay Abraham Israel Vijayponraj ,  Bradley Douglas Cobb ,  Sanand Prasad ,  Gregory Raymond Shurtz ,  Martin Jeffrey Ambrose ,  Jayant Thakur

IPC: G06F15/78 ,  G06F13/10

Abstract: An integrated circuit. The integrated circuit comprises an interconnect communication bus and a plurality of peripheral component interconnect (PCI) multi-function endpoints (MFN-EPs) coupled to the interconnect communication bus, each PCI MFN-EP comprising a multiplexing device, a first address translation unit (ATU), and at least one PCI function circuit, each PCI function circuit comprising another ATU and a plurality of base address registers (BARs).

公开(公告)号：US20210209737A1

公开(公告)日：2021-07-08

申请号：US17119714

申请日：2020-12-11

Applicant: Texas Instruments Incorporated

Inventor： Gang Hua ,  Rajasekhar Reddy Allu ,  Niraj Nandan ,  Mihir Narendra Mody

IPC: G06T5/00 ,  G06T7/60 ,  G06T3/00 ,  G06T11/40

Abstract: A method for error handling in a geometric correction engine (GCE) is provided that includes receiving configuration parameters by the GCE, generating, by the GCE in accordance with the configuration parameters, output blocks of an output frame based on corresponding blocks of an input frame, detecting, by the GCE, a run-time error during the generating, and reporting, by the GCE, an event corresponding to the run-time error.

公开(公告)号：US11030144B2

公开(公告)日：2021-06-08

申请号：US16221364

申请日：2018-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason A. T. Jones ,  Sriramakrishnan Govindarajan ,  Mihir Narendra Mody ,  Kishon Vijay Abraham Israel Vijayponraj ,  Bradley Douglas Cobb ,  Sanand Prasad ,  Gregory Raymond Shurtz ,  Martin Jeffrey Ambrose ,  Jayant Thakur

IPC: G06F15/78 ,  G06F13/10

Abstract: An integrated circuit. The integrated circuit comprises an interconnect communication bus and a plurality of peripheral component interconnect (PCI) multi-function endpoints (MFN-EPs) coupled to the interconnect communication bus, each PCI MFN-EP comprising a multiplexing device, a first address translation unit (ATU), and at least one PCI function circuit, each PCI function circuit comprising another ATU and a plurality of base address registers (BARs).

公开(公告)号：US11027656B1

公开(公告)日：2021-06-08

申请号：US16709548

申请日：2019-12-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajat Sagar ,  Mihir Narendra Mody ,  Anthony Joseph Lell ,  Gregory Raymond Shurtz

IPC: H04N21/2343 ,  B60R1/00 ,  H04N5/225

Abstract: A hub that receives sensor data streams and then distributes the data streams to the various systems that use the sensor data. A demultiplexer (demux) receives the streams, filters out undesired streams and provides desired streams to the proper multiplexer (mux) or muxes of a series of muxes. Each mux combines received streams and provides an output stream to a respective formatter or output block. The formatter or output block is configured based on the destination of the mux output stream, such as an image signal processor, a processor, memory or external transmission. The output block reformats the received stream to a format appropriate for the recipient and then provides the reformatted stream to that recipient.

公开(公告)号：US20210042891A1

公开(公告)日：2021-02-11

申请号：US17080884

申请日：2020-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajasekhar Reddy Allu ,  Niraj Nandan ,  Mihir Narendra Mody ,  Gang Hua ,  Brian Okchon Chae ,  Shashank Dabral ,  Hetul Sanghvi ,  Vikram VijayanBabu Appia ,  Sujith Shivalingappa

IPC: G06T5/00 ,  G06T3/00

Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.

公开(公告)号：US10853923B2

公开(公告)日：2020-12-01

申请号：US15927820

申请日：2018-03-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajasekhar Reddy Allu ,  Niraj Nandan ,  Mihir Narendra Mody ,  Gang Hua ,  Brian Okchon Chae ,  Shashank Dabral ,  Hetul Sanghvi ,  Vikram VijayanBabu Appia ,  Sujith Shivalingappa

IPC: G06T5/00 ,  G06T3/00

Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.

公开(公告)号：US20200258188A1

公开(公告)日：2020-08-13

申请号：US16858596

申请日：2020-04-25

Applicant: Texas Instruments Incorporated

Inventor： Hrushikesh Tukaram Garud ,  Ankit Ajmani ,  Soyeb Noormohammed Nagori ,  Mihir Narendra Mody

IPC: G06T1/20 ,  G06T1/60 ,  H04N19/91

Abstract: A computer vision system is provided that includes a camera capture component configured to capture an image from a camera, a memory, and an image compression decompression engine (ICDE) coupled to the memory and configured to receive each line of the image, and compress each line to generate a compressed bit stream. To compress a line, the ICDE is configured to divide the line into compression units, and compress each compression unit, wherein to compress a compression unit, the ICDE is configured to perform delta prediction on the compression unit to generate a delta predicted compression unit, compress the delta predicted compression unit using exponential Golomb coding to generate a compressed delta predicted compression unit, and add the compressed delta predicted compression unit to the compressed bit stream.

公开(公告)号：US10455238B2

公开(公告)日：2019-10-22

申请号：US15853474

申请日：2017-12-22

Applicant: Texas Instruments Incorporated

Inventor： Mihir Narendra Mody ,  Niraj Nandan ,  Hideo Tamama

IPC: H04N19/176 ,  H04N19/117 ,  H04N19/14 ,  H04N19/82 ,  H04N19/86 ,  H04N19/186

Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.

公开(公告)号：US20190289333A1

公开(公告)日：2019-09-19

申请号：US16432317

申请日：2019-06-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mihir Narendra Mody ,  Chaitanya S. Ghone ,  Joseph Meehan

IPC: H04N19/86 ,  H04N19/44 ,  H04N19/82 ,  H04N19/42

Abstract: A video decoder system, in one embodiment, includes one or more processors and a memory storing instructions that when executed by the one or more processors cause the video decoding system to perform an entropy decoding operation in a frame level pipelined manner on a bitstream representative of encoded video data to produce first output data, perform at least one of an inverse quantization operation or an inverse frequency transform operation in a row level pipelined manner on the first output data to produce second output data, perform a deblocking filtering operation on first input data that includes the second output data in a row level pipelined manner to produce third output data, and output a decoded video output based on the third output data.