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公开(公告)号:US11880333B2
公开(公告)日:2024-01-23
申请号:US17314313
申请日:2021-05-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jason A. T. Jones , Sriramakrishnan Govindarajan , Mihir Narendra Mody , Kishon Vijay Abraham Israel Vijayponraj , Bradley Douglas Cobb , Sanand Prasad , Gregory Raymond Shurtz , Martin Jeffrey Ambrose , Jayant Thakur
CPC classification number: G06F15/7807 , G06F13/10 , G06F15/7864
Abstract: An integrated circuit. The integrated circuit comprises an interconnect communication bus and a plurality of peripheral component interconnect (PCI) multi-function endpoints (MFN-EPs) coupled to the interconnect communication bus, each PCI MFN-EP comprising a multiplexing device, a first address translation unit (ATU), and at least one PCI function circuit, each PCI function circuit comprising another ATU and a plurality of base address registers (BARs).
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公开(公告)号:US20210263883A1
公开(公告)日:2021-08-26
申请号:US17314313
申请日:2021-05-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jason A.T. Jones , Sriramakrishnan Govindarajan , Mihir Narendra Mody , Kishon Vijay Abraham Israel Vijayponraj , Bradley Douglas Cobb , Sanand Prasad , Gregory Raymond Shurtz , Martin Jeffrey Ambrose , Jayant Thakur
Abstract: An integrated circuit. The integrated circuit comprises an interconnect communication bus and a plurality of peripheral component interconnect (PCI) multi-function endpoints (MFN-EPs) coupled to the interconnect communication bus, each PCI MFN-EP comprising a multiplexing device, a first address translation unit (ATU), and at least one PCI function circuit, each PCI function circuit comprising another ATU and a plurality of base address registers (BARs).
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公开(公告)号:US11030144B2
公开(公告)日:2021-06-08
申请号:US16221364
申请日:2018-12-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jason A. T. Jones , Sriramakrishnan Govindarajan , Mihir Narendra Mody , Kishon Vijay Abraham Israel Vijayponraj , Bradley Douglas Cobb , Sanand Prasad , Gregory Raymond Shurtz , Martin Jeffrey Ambrose , Jayant Thakur
Abstract: An integrated circuit. The integrated circuit comprises an interconnect communication bus and a plurality of peripheral component interconnect (PCI) multi-function endpoints (MFN-EPs) coupled to the interconnect communication bus, each PCI MFN-EP comprising a multiplexing device, a first address translation unit (ATU), and at least one PCI function circuit, each PCI function circuit comprising another ATU and a plurality of base address registers (BARs).
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