HIGH POWER FET SWITCH
    111.
    发明申请
    HIGH POWER FET SWITCH 有权
    大功率FET开关

    公开(公告)号:US20110260780A1

    公开(公告)日:2011-10-27

    申请号:US13095357

    申请日:2011-04-27

    CPC classification number: H03K17/102

    Abstract: Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. A control circuit provides biasing voltages to the gate, source, and drain contacts of each of the plurality of FET devices to switch the FET device stack to and from a closed state and an open state. In the open state, the gate contacts of each of the plurality of FET devices are biased by the control circuit at the second voltage. To prevent activation in the open state, the control circuit biases the drain contacts and source contacts of each of the plurality of FET devices at the first voltage. The first voltage is positive relative to a reference voltage, such as ground, while the second voltage is non-negative relative to the reference voltage but less than the first voltage.

    Abstract translation: 描述了具有串联耦合以形成FET器件堆叠的多个FET器件的堆叠场效应晶体管(FET)开关的实施例。 控制电路向多个FET器件中的每一个FET器件的栅极,源极和漏极触点提供偏置电压,以将FET器件堆叠切换到闭合状态和断开状态。 在打开状态下,多个FET器件中的每一个的栅极触点被第二电压的控制电路偏置。 为了防止在打开状态下的激活,控制电路以第一电压偏置多个FET器件中的每一个的漏极触点和源极触点。 第一电压相对于参考电压(例如接地)为正,而第二电压相对于参考电压为非负,但小于第一电压。

    MULTIBAND SIMULTANEOUS TRANSMISSION AND RECEPTION FRONT END ARCHITECTURE
    112.
    发明申请
    MULTIBAND SIMULTANEOUS TRANSMISSION AND RECEPTION FRONT END ARCHITECTURE 有权
    多通道同时传输和接收前端架构

    公开(公告)号:US20110234335A1

    公开(公告)日:2011-09-29

    申请号:US12969867

    申请日:2010-12-16

    Applicant: Nadim Khlat

    Inventor: Nadim Khlat

    CPC classification number: H04B1/406

    Abstract: A user equipment (UE) front end (FE) that is adapted for multiband simultaneous transmission and reception is provided. The UE FE includes a first multi-filter device having a transmit (TX) band-pass filter adapted to pass a first TX signal band associated with a first radio access technology type, and a receive (RX) band-pass filter adapted to pass a second RX signal band associated with a second radio access technology type. The UE FE also includes a second multi-filter device having a TX band-pass filter adapted to pass a second TX signal band associated with the second radio access technology type and an RX band-pass filter adapted to pass the first RX signal band associated with the first radio access technology type. The first radio access technology type and the second radio access technology type are preferably long term evolution (LTE) and code division multiple access 2000 (CDMA2000), respectively, or vice versa.

    Abstract translation: 提供了适用于多频带同时发送和接收的用户设备(UE)前端(FE)。 UE FE包括具有适于通过与第一无线电接入技术类型相关联的第一TX信号频带的发射(TX)带通滤波器的第一多滤波器设备和适于通过的接收(RX)带通滤波器 与第二无线电接入技术类型相关联的第二RX信号频带。 UE FE还包括具有适于通过与第二无线电接入技术类型相关联的第二TX信号频带的TX带通滤波器的第二多滤波器设备和适于通过相关联的第一RX信号带的RX带通滤波器 具有第一种无线电接入技术类型。 第一无线电接入技术类型和第二无线电接入技术类型优选地分别是长期演进(LTE)和码分多址2000(CDMA2000),反之亦然。

    Design for testability circuitry for radio frequency transmitter circuitry
    113.
    发明授权
    Design for testability circuitry for radio frequency transmitter circuitry 有权
    射频发射机电路可测试电路设计

    公开(公告)号:US08005443B1

    公开(公告)日:2011-08-23

    申请号:US11774952

    申请日:2007-07-09

    CPC classification number: H04B17/18 H04B17/13

    Abstract: The present invention is design for testability (DFT) circuitry used with RF transmitter circuitry to enable RF parameter adjustments, which provide compliance with requirements, to configure the RF transmitter circuitry for a particular application or range of applications, and to permanently store adjustment information, configuration information, or both, in non-volatile memory. The DFT circuitry and the RF transmitter circuitry may be used to form a standard RF module, which can be provided to a number of customers for use in a number of applications. The standard RF module may be adjusted, configured, or both during manufacturing, which may eliminate calibrations, adjustments, or configurations by customers.

    Abstract translation: 本发明是用于与RF发射机电路一起使用的可测试性(DFT)电路的设计,以实现符合要求的RF参数调整,以配置用于特定应用或应用范围的RF发射机电路,并且永久存储调整信息, 配置信息,或两者都在非易失性存储器中。 DFT电路和RF发射器电路可以用于形成标准RF模块,其可以提供给多个用户以用于许多应用。 标准RF模块可以在制造过程中调整,配置或同时进行,这可能会消除客户的校准,调整或配置。

    AM to PM correction system for polar modulator
    114.
    发明授权
    AM to PM correction system for polar modulator 有权
    AM到极化调制器的PM校正系统

    公开(公告)号:US07991071B2

    公开(公告)日:2011-08-02

    申请号:US10147569

    申请日:2002-05-16

    CPC classification number: H04L27/361

    Abstract: A transmitter includes a polar modulator that creates phase and amplitude signals which in turn drive a power amplifier. To compensate for AM to PM conversion of the amplitude signal into the amplified signal, a compensation signal is generated from the amplitude signal and combined with the phase signal such that when amplified, the compensation signal cancels the AM to PM conversion. The compensation signal may have an offset term, a linear term, a quadratic term, and a cubic term. A second embodiment comprises a technique by which AM to AM conversion may concurrently be addressed using a second compensation signal.

    Abstract translation: 发射机包括极化调制器,其产生相位和幅度信号,其又驱动功率放大器。 为了补偿振幅信号的AM到PM转换为放大信号,从幅度信号产生补偿信号并与相位信号组合,使得当放大时,补偿信号取消AM到PM转换。 补偿信号可以具有偏移项,线性项,二次项和三次项。 第二实施例包括一种可以使用第二补偿信号并行地寻址AM到AM转换的技术。

    Anchor/support design for MEMS resonators
    115.
    发明授权
    Anchor/support design for MEMS resonators 有权
    MEMS谐振器的锚/支撑设计

    公开(公告)号:US07990232B1

    公开(公告)日:2011-08-02

    申请号:US12133934

    申请日:2008-06-05

    Applicant: Seungbae Lee

    Inventor: Seungbae Lee

    Abstract: Micro-Electro-Mechanical Systems (MEMS) resonator designs having support structures that minimize or substantially reduce anchor losses, thereby improving a quality factor (Q) of the MEMS resonators, are provided. In general, a MEMS resonator includes a resonator body connected to anchors via support structures. The anchors are connected to or are part of a substrate on which the MEMS resonator is formed. The support structures operate to support the resonator body in free space to enable vibration. The support structures are designed to minimize or substantially reduce energy loss through the anchors into the substrate.

    Abstract translation: 提供了具有最小化或基本上减少锚固损耗从而提高MEMS谐振器的质量因子(Q)的支撑结构的微机电系统(MEMS)谐振器设计。 通常,MEMS谐振器包括通过支撑结构连接到锚的谐振器体。 锚固件连接到或者是其上形成有MEMS谐振器的基板的一部分。 支撑结构用于将谐振器主体支撑在自由空间中以实现振动。 支撑结构被设计成使通过锚固件进入衬底的能量损失最小化或基本上减少。

    Excess current and saturation detection and correction in a power amplifier
    116.
    发明授权
    Excess current and saturation detection and correction in a power amplifier 有权
    在功率放大器中过电流和饱和度检测和校正

    公开(公告)号:US07962109B1

    公开(公告)日:2011-06-14

    申请号:US11679201

    申请日:2007-02-27

    CPC classification number: H03G3/3047

    Abstract: A system and method for detecting and correcting over-current and/or over-voltage conditions in power amplifier circuitry in a transmit chain of a mobile terminal are provided. In general, over-current detection and correction circuitry combines a current detection signal indicative of a current provided to or drained by the power amplifier circuitry during ramp-up for a transmit burst and a substantially inverse current ramping profile to provide a first constant value. The first constant value is compared to a current threshold or limit value to determine whether an over-current condition exists. If an over-current condition exists, the over-current detection and correction circuitry operates to reduce the output power of the power amplifier circuitry during ramp-up for the transmit burst to correct for the over-current condition. In a similar manner, over-voltage detection circuitry operates to detect and correct over-voltage conditions during ramp-up for the transmit burst.

    Abstract translation: 提供了一种用于在移动终端的发射链中的功率放大器电路中检测和校正过电流和/或过电压条件的系统和方法。 通常,过电流检测和校正电路组合指示在斜波上升期间功率放大器电路提供给发射脉冲串的电流的电流检测信号和用于发射脉冲串的基本上反向电流斜坡分布以提供第一恒定值。 将第一常数值与当前阈值或限制值进行比较,以确定是否存在过电流条件。 如果存在过电流状况,则过流检测和校正电路用于在发射突发的斜坡上降低功率放大器电路的输出功率,以校正过电流状况。 以类似的方式,过电压检测电路用于在发射突发的斜坡上升期间检测和校正过电压状况。

    MULTIPLEXED SERIAL CONTROL BUS
    117.
    发明申请
    MULTIPLEXED SERIAL CONTROL BUS 有权
    多路串行控制总线

    公开(公告)号:US20110133852A1

    公开(公告)日:2011-06-09

    申请号:US12962941

    申请日:2010-12-08

    CPC classification number: H01Q9/14

    Abstract: A signal line sharing protocol and hardware permit control of a remotely located active device configured to provide different load configurations to an antenna. As an example, the communication system may include a master device. The master device may include a general purpose output and a radio frequency port. The communication system may further include a first duplexer and a second duplexer. The first duplexer may include a first port, a second port, and a third port, where the second port is coupled to the radio frequency port and the third port is coupled to the general purpose output of the master device. The second duplexer may include a first port, a second port, and a third port, where the first port of the second duplexer is in communication with the first port of the first duplexer, wherein the second port is coupled to an antenna, and where the third port is in communication with a slave device. The slave device may be coupled to the antenna. In response to commencement of a command from the master device, the slave device may clamp the antenna to ground.

    Abstract translation: 信号线共享协议和硬件允许控制远程定位的有源设备,其被配置为向天线提供不同的负载配置。 作为示例,通信系统可以包括主设备。 主设备可以包括通用输出和射频端口。 通信系统还可以包括第一双工器和第二双工器。 第一双工器可以包括第一端口,第二端口和第三端口,其中第二端口耦合到射频端口,并且第三端口耦合到主设备的通用输出端。 第二双工器可以包括第一端口,第二端口和第三端口,其中第二双工器的第一端口与第一双工器的第一端口通信,其中第二端口耦合到天线,并且其中 第三端口与从设备通信。 从设备可以耦合到天线。 响应于从主设备的命令的开始,从设备可以将天线夹紧到地。

    Enhancement mode MOSFET and depletion mode FET on a common group III-V substrate
    118.
    发明授权
    Enhancement mode MOSFET and depletion mode FET on a common group III-V substrate 有权
    增强型MOSFET和耗尽型FET在公共III-V族基板上

    公开(公告)号:US07952150B1

    公开(公告)日:2011-05-31

    申请号:US12479290

    申请日:2009-06-05

    Abstract: The present invention relates to providing an enhancement-mode (e-mode) Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) with a complementary depletion-mode (d-mode) FET on a common group III-V substrate. The depletion mode FET may be another MOSFET, a MEtal-Semiconductor FET (MESFET), a High Electron Mobility Transistor (HEMT), or like FET structure. In particular, the e-mode MOSFET includes a gate structure that resides between source and drain structures on a transistor body. The gate structure includes a gate contact that is separated from the transistor body by a gate oxide. The gate oxide is an oxidized material that includes Indium and Phosphorus. The gate oxide is formed beneath the gate contact.

    Abstract translation: 本发明涉及在公共III-V族基板上提供具有互补耗尽型(d模式)FET的增强型(e-mode)金属氧化物半导体场效应晶体管(MOSFET)。 耗尽型FET可以是另一种MOSFET,MEtal-Semiconductor FET(MESFET),高电子迁移率晶体管(HEMT)或类似的FET结构。 特别地,e模式MOSFET包括位于晶体管本体上的源极和漏极结构之间的栅极结构。 栅极结构包括通过栅极氧化物与晶体管本体分离的栅极接触。 栅极氧化物是包括铟和磷的氧化材料。 栅极氧化物形成在栅极接触之下。

    Unlatch feature for latching ESD protection circuit
    119.
    发明授权
    Unlatch feature for latching ESD protection circuit 有权
    用于锁定ESD保护电路的解锁功能

    公开(公告)号:US07929263B1

    公开(公告)日:2011-04-19

    申请号:US11832114

    申请日:2007-08-01

    CPC classification number: H02H9/046

    Abstract: The present invention is a latching electrostatic discharge (ESD) protection circuit that enables and latches an ESD clamping circuit upon an ESD event, and disables and un-latches the ESD clamping circuit upon either a drop in the DC supply voltage below a defined threshold or a time-out. The time-out protects against effects of inadvertent latching or any anomaly in which the latching ESD clamping circuit does not un-latch. An ESD event is a voltage spike between the DC supply voltage and ground wherein the ESD clamping circuit applies a low impedance between the DC supply voltage and ground to dissipate the energy contained in the voltage spike, thereby protecting adjacent circuitry.

    Abstract translation: 本发明是一种闭锁静电放电(ESD)保护电路,其在ESD事件时启用和锁存ESD钳位电路,并且在直流电源电压的下降低于定义的阈值时禁用和解锁ESD钳位电路,或 超时 超时保护可以防止无意锁定或任何异常,其中闩锁ESD钳位电路不会解锁。 ESD事件是DC电源电压和地之间的电压尖峰,其中ESD钳位电路在DC电源电压和地之间施加低阻抗以耗散包含在电压尖峰中的能量,从而保护相邻电路。

    Low noise fast dithering switching power supply
    120.
    发明授权
    Low noise fast dithering switching power supply 有权
    低噪声快速抖动开关电源

    公开(公告)号:US07928712B1

    公开(公告)日:2011-04-19

    申请号:US11756909

    申请日:2007-06-01

    CPC classification number: H02M3/156

    Abstract: The present invention is a switching power supply that switches (dithers) between at least two switching frequencies without introducing a ripple signal at the dithering frequency, which is based on the time duration of a dithering cycle. In one embodiment of the present invention, an average current in an energy transfer element, such as an inductive element, during operation using one switching frequency is regulated to be approximately equal to the average current during operation using any other switching frequency. The average current may be regulated by controlling the durations of transition periods between operating using one switching frequency and operating using another switching frequency. By maintaining a constant average current while operating using different switching frequencies, dithering frequency ripple may be significantly reduced or eliminated.

    Abstract translation: 本发明是一种开关电源,其在至少两个开关频率之间切换(抖动),而不引入基于抖动周期的持续时间的抖动频率处的纹波信号。 在本发明的一个实施例中,在使用一个开关频率的操作期间能量传递元件(例如电感元件)中的平均电流被调节为大约等于使用任何其它开关频率的操作期间的平均电流。 可以通过控制使用一个开关频率的操作和使用另一个开关频率的操作之间的过渡期的持续时间来调节平均电流。 通过在使用不同的开关频率进行操作时保持恒定的平均电流,可以显着减少或消除抖动频率纹波。

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