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公开(公告)号：US20220146627A1
公开(公告)日：2022-05-12
申请号：US17095813
申请日：2020-11-12
Inventor： Tim Fisch , Albrecht Lohoefener , Jeffrey PAUL
Abstract: A method for calibrating a target simulator for an active environment detection system includes: calibrating a complete signal path comprising a first signal path and a second signal path by determining a first deviation of a first value of at least one signal parameter from a first reference value of the at least one signal parameter; calibrating one of the first signal path and the second signal path by determining a second deviation of a second value of the at least one signal parameter from a second reference value of the at least one signal parameter; and calibrating the other of the first signal path and the second signal path by offsetting of the first deviation with the second deviation.
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公开(公告)号：US20220082658A1
公开(公告)日：2022-03-17
申请号：US17419914
申请日：2019-12-28
Inventor： Jeffrey Paul , Ronald Bergen
Abstract: A method for testing a distance sensor includes: receiving an electromagnetic free-space wave as a receive signal; generating a simulated electromagnetic reflection signal therefrom; shifting a reflection frequency of the reflection signal by a Doppler frequency smaller than a signal bandwidth of the receive signal; converting the receive signal into a first work signal having a first work frequency smaller than a receive frequency of the receive signal; converting the first work signal into a second work signal having a second work frequency, wherein the difference between the first and second work frequencies is at least as large as the signal bandwidth plus the Doppler frequency; converting the second work signal into a third work signal having a third work frequency that corresponds to the first work frequency shifted by the Doppler frequency; increasing the third work signal by the conversion frequency; and radiating the third work signal.
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123.发明申请公开(公告)号：US20220060389A1
公开(公告)日：2022-02-24
申请号：US17518288
申请日：2021-11-03
Inventor： Heiko KALTE , Dominik LUBELEY
Abstract: A computer-implemented method for restructuring a predefined distributed real-time simulation network, wherein the simulation network has a plurality of network nodes and a plurality of data connections, wherein each network node has at least one data connection interface for connecting a data connection, wherein the network nodes are at least partially in communication via the data connections, and wherein during operation of the simulation network a simulation application is executed on at least one network node. The method permits a structure for the real-time simulation network to be automatically found in which the critical communication connections are reduced and avoided as much as possible by determining the topology of the simulation network so that topology information concerning the network nodes and the data connections between the network nodes is available by determining expected values for node data rates or node latencies for the network nodes of the simulation network.
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124.发明授权公开(公告)号：US11222159B2
公开(公告)日：2022-01-11
申请号：US17178787
申请日：2021-02-18
Inventor： Heiko Kalte , Dominik Lubeley
IPC: G06F30/30 , G06F30/392 , G06F30/34 , G06F30/347 , G06F30/337 , G06F30/343
Abstract: A method for planning the design of partitions for a programmable gate array comprising different types of logic blocks of predetermined position, and a plurality of program routines comprising at least one first program routine and at least one further program routine. A mapping of a first partition of the programmable gate array with the first program routine and at least one further partition of the programmable gate array with the at least one further program routine is performed. The need of the first program routine for the individual types of logic blocks is determined. Meeting this need with the logic block resources of corresponding type available in the first partition. At least one logic block of corresponding type from the further partition or at least one of the further partitions into the first partition is transferred.
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公开(公告)号：US20210373545A1
公开(公告)日：2021-12-02
申请号：US17399655
申请日：2021-08-11
Inventor： Bjoern MUELLER
Abstract: A method and replay unit for sending secured messages via a messaging system to a receiver ECU to be tested, wherein the replay unit is connected to the device under test via the messaging system, wherein the replay unit is set up to receive first secured messages to be replayed, to remove from the first secured messages a first counter value and a first authenticator, and to generate a second authenticator by means of a second counter value, an encryption algorithm and a key, and wherein the replay unit is set up to generate second secured messages by adding the second counter value and the second authenticator to the first messages, and wherein the replay unit is further adapted to send the second secured messages to the recipient device under test via the messaging system.
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Patent Agency Ranking
公开(公告)号：US11169208B2
公开(公告)日：2021-11-09
申请号：US16205765
申请日：2018-11-30
Inventor： Matthias Klemm
IPC: G01R31/28 , G01R31/317 , G06F1/08 , G05B19/042
Abstract: A checking apparatus can test at least one first closed-loop control unit. The checking apparatus can include a first timing transmission unit which can generate a first periodic timing signal from a first time signal, and which can output the first periodic timing signal to a first PLL. The check device can further include a first oscillator which can generate a second periodic timing signal and which can output the second periodic timing signal to a second PLL. The checking device can additionally include a first clock, and can forward a first clock signal to a first input/output unit, and/or to a first computation unit. A first changeover signal can be used to control a first multiplexer such that depending on a state of the first changeover signal, the first multiplexer can forward either a first frequency-stabilized timing signal or a second frequency-stabilized timing signal to the first clock.
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公开(公告)号：US11074049B2
公开(公告)日：2021-07-27
申请号：US16230312
申请日：2018-12-21
Inventor： Lars Wallbaum , Wolfgang Trautmann
Abstract: A computer-implemented method for generating program code based on one or more blocks of a block diagram, at least one block including a block variable. The method comprises opening the block diagram in a model editor, retrieving generation settings for the block variable from a data definition tool, the generation settings comprising a scope of the variable, determining that a modification rule is referenced in the generation settings, and retrieving the referenced modification rule from the data definition tool, wherein a modification rule comprises a filter condition and one or more code changes. A processor generates program code based on the block diagram and the generation settings and applies the referenced modification rule to the block variable in the generated code, which includes verifying that the filter condition is fulfilled for the block variable and applying the code changes to each occurrence of the variable in the code.
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公开(公告)号：US11062071B2
公开(公告)日：2021-07-13
申请号：US16827796
申请日：2020-03-24
Inventor： Vivien Chandra , Philip Grunert
IPC: G06F30/343 , G06F17/16 , G06F30/3308
Abstract: A method for computer-based simulation or control of a dynamic system using a computer includes: cyclically receiving, by a programmable logic device, at least one input signal; calculating, by the programmable logic device, at least one matrix multiplication; and outputting, by the programmable logic device, at least one output signal. A configuration of the programmable logic device includes: a parallel multiplication of blocks of at least two elements of a matrix by at least one input-signal-dependent element of a vector, and an adder tree for multiplication results. Successive blocks of the matrix are temporarily stored in a pipeline and processed sequentially. A target number of blocks and a target adder stage are determined based on a number and/or values of parameters of at least one system equation. Processing of blocks for a current cycle is terminated based on the target number of blocks and the target adder stage being reached.
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129.发明申请公开(公告)号：US20210165748A1
公开(公告)日：2021-06-03
申请号：US17109785
申请日：2020-12-02
Inventor： Markus SUEVERN
Abstract: A computer-implemented method for integrating at least one signal value into a virtual control unit. The virtual control unit is executed on a simulation platform by means of a personal computer and requires at least one input signal, wherein at least one signal value can be assigned to the input signal. A simulation function provides at least one first simulated signal value to the virtual control unit. The microcontroller abstraction layer has a software component for integrating the first simulated signal value and a second external signal value into a virtual control unit, wherein the second external signal value is provided by an external peripheral device. A user makes a selection for the input signal via a user interface as to whether the software component is to use the first simulated signal value or the second external signal value.
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公开(公告)号：US10805779B2
公开(公告)日：2020-10-13
申请号：US15265883
申请日：2016-09-15
Inventor： Gregor Hordys , Andre Rolfsmeier
Abstract: A computer-implemented method for implementing a V2X application on target hardware having a radio adapter, wherein the V2X application is modeled in the form of a block diagram by means of a graphical modeling environment and the block diagram is compiled into a V2X program that can be executed on the target hardware and the V2X program is transferred to the target hardware and executed there. The method for implementing a V2X application is realized in an especially simple and advantageous manner in that a V2X communication block that has at least one radio adapter interface, by means of which data are exchanged between the radio adapter and the V2X communication block, is used to create the block diagram.
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