公开(公告)号：US4335502A

公开(公告)日：1982-06-22

申请号：US192872

申请日：1980-10-01

Applicant: Paul Richman

Inventor： Paul Richman

IPC: H01L21/033 ,  H01L21/336 ,  H01L29/78 ,  H01L21/22 ,  H01L21/283 ,  H01L21/308

CPC classification number: H01L29/66575 ,  H01L21/033 ,  H01L29/78

Abstract: A metal-oxide-semiconductor (MOS) structure and method for its fabrication wherein all contact hole locations are simultaneously photolithographically defined in the gate oxide layer and openings are etched at these locations prior to the deposition of polysilicon, which is then etched to form interconnections and contacts. The completed structure contains a thick oxide layer which forms an insulating dielectric which surrounds and is self-aligned with the contact holes and obviates the need for the commonly used intermediate layer of phosphosilicate glass. The width of the polysilicon contacts to sources and drains is less than the width of the active channel formed in a conventional n-channel silicon gate Metal-Oxide-Silicon field-effect transistor so that significant misalignment in the channel length direction between the opening in the gate oxide at a contact hole location and the polysilicon pattern will not cause failure of individual field effect transistors (FETs). Thus, any non-etched gate oxide which remains under the polysilicon contacts will mask against diffusion of impurities, but will not block the flow of current between source and drain of the FET because the polysilicon source or drain contact does not extend across the entire channel width, thereby providing parallel current paths.

Abstract translation: 一种用于其制造的金属氧化物半导体（MOS）结构及其制造方法，其中在栅极氧化物层中同时光刻地限定所有接触孔位置，并且在沉积多晶硅之前在这些位置蚀刻开口，然后将其蚀刻形成互连 和联系人。 完成的结构包含厚的氧化物层，其形成绝缘电介质，其围绕并与接触孔自对准，并且不需要常用的磷硅酸盐玻璃的中间层。 多晶硅接触源极和漏极的宽度小于在常规n沟道硅栅极金属氧化物 - 硅场效应晶体管中形成的有源沟道的宽度，使得在开口中的通道长度方向上的显着的未对准 接触孔位置处的栅极氧化物和多晶硅图案不会导致各个场效应晶体管（FET）的故障。 因此，保留在多晶硅接触下方的任何未蚀刻的栅极氧化物将掩盖杂质的扩散，但是不会阻挡FET的源极和漏极之间的电流流动，因为多晶硅源极或漏极接触不延伸穿过整个通道 宽度，从而提供并联电流路径。

公开(公告)号：US4324040A

公开(公告)日：1982-04-13

申请号：US172018

申请日：1980-07-24

Applicant: John D. Gottlieb

Inventor： John D. Gottlieb

IPC: B23P19/04 ,  H05K13/04

CPC classification number: B23P19/04 ,  H05K13/0486 ,  Y10T29/49124 ,  Y10T29/53283

Abstract: A tool for removing integrated circuit packages from the sockets of a burn-in board includes a plurality of parallel elongated prongs spaced from one another by an amount corresponding to the distance between adjacent rows of sockets on the burn-in board. A cover including a protective layer, such as of foam material, is mounted for pivotal movement with respect to the prongs. To remove the integrated circuit packages from the burn-in board following a burn-in procedure, the prongs are inserted along the longitudinal spaces between adjacent rows of sockets and the free end of the cover is latched to the prongs. The prongs are then lifted upwards, thereby to remove the integrated circuit packages from the sockets.

Abstract translation: 用于从老化板的插座中去除集成电路封装的工具包括多个彼此间隔开的平行的细长插脚，其数量对应于老化板上相邻的插座排之间的距离。 安装包括保护层（例如泡沫材料）的盖子用于相对于插脚的枢轴运动。 为了在老化过程之后从老化板上卸下集成电路封装，插脚插入相邻的插座列之间的纵向空间，盖子的自由端被锁定到插脚上。 然后将插脚向上提起，从而从插座中移除集成电路封装。

公开(公告)号：US4282647A

公开(公告)日：1981-08-11

申请号：US79163

申请日：1979-09-26

Applicant: Paul Richman

Inventor： Paul Richman

IPC: H01L21/033 ,  H01L21/32 ,  H01L21/336 ,  H01L21/762 ,  H01L29/45 ,  H01L29/49 ,  H01L21/223 ,  H01L21/283

CPC classification number: H01L29/66575 ,  H01L21/0332 ,  H01L21/32 ,  H01L21/76216 ,  H01L29/456 ,  H01L29/495 ,  H01L29/4975

Abstract: A method for fabricating an MOS integrated circuit having a refractory metal gate structure includes the formation of an insulating layer and a conductive refractory metal layer on a substrate, followed by the selective removal of portions of these layers to define the locations of source, drain, and other diffused regions. After the diffusion or implantation of the drain and source regions, using the refractory metal as a mask, the refractory metal, other than at the gate regions, is removed, and the portion of the underlying insulating layer that is thereby exposed is then etched away. An oxidizing step is performed to form a thick oxide region at those areas of the substrate not covered by the remaining portions of the refractory metal layer. Also disclosed is an MOS refractory metal gate MOS device fabricated by the method.

Abstract translation: 一种用于制造具有难熔金属栅极结构的MOS集成电路的方法，包括在衬底上形成绝缘层和导电难熔金属层，然后选择性地去除这些层的部分以限定源极，漏极， 和其他扩散区域。 在漏极和源极区域的扩散或植入之后，使用难熔金属作为掩模，除了在栅极区域之外的难熔金属被去除，然后将由此暴露的下面的绝缘层的部分蚀刻掉 。 执行氧化步骤以在未被难熔金属层的其余部分覆盖的基板的那些区域处形成厚的氧化物区域。 还公开了通过该方法制造的MOS难熔金属栅极MOS器件。

公开(公告)号：US09794378B2

公开(公告)日：2017-10-17

申请号：US11928647

申请日：2007-10-30

Applicant: Hariramanathan Ramakrishnan ,  Bryan A. Whitehead ,  Maksim A. Azarov ,  Neil A. Winchester ,  William R. Chiechi

Inventor： Hariramanathan Ramakrishnan ,  Bryan A. Whitehead ,  Maksim A. Azarov ,  Neil A. Winchester ,  William R. Chiechi

IPC: H04L29/06 ,  H04L29/12 ,  H04L12/861

CPC classification number: H04N21/2393 ,  H04L29/06 ,  H04L29/12009 ,  H04L49/90 ,  H04L63/02 ,  H04L69/16 ,  H04L69/161 ,  H04L69/167 ,  H04L69/18 ,  H04N21/4108 ,  H04W28/0242

Abstract: A Network Device (ND) may be configured to enable secure digital video streaming for HD (high definition) digital video systems over a standard network. The ND may operate in at least one of two modes, a co-processor mode and a stand-alone mode, and may provide at least three high level functions: network interface control (NIC), video streaming offload (VSO), and stand-alone video streaming (SVS). To seamlessly execute the VSO functionality, the ND may be configured to have two network stacks running synchronously on a single network interface having a single network address. The two network stacks may share the data traffic, while the Host network stack may act as a master, and configure the ND network stack to accept only specifically designated traffic, thus offloading some of the data processing to the processor configured in the ND. The ND network system may appear as an ordinary network controller to the Host, from which the user may configure the ND network driver to obtain/set the network address, configure the physical layer link speed and duplex mode, configure the multicast filter settings, and obtain and clear the network level statistics.

公开(公告)号：US09348730B2

公开(公告)日：2016-05-24

申请号：US11669776

申请日：2007-01-31

Applicant: Andrew J. Odlivak ,  Ravindra Kumar ,  Warren R. Stearns ,  John Glen Rockford

Inventor： Andrew J. Odlivak ,  Ravindra Kumar ,  Warren R. Stearns ,  John Glen Rockford

IPC: G06F9/44 ,  G06F11/36

CPC classification number: G06F11/3644 ,  G06F11/3628 ,  G06F11/3648

Abstract: A system in which firmware residing in ROM may be upgraded without re-spinning silicon. A one-bit flag may be assigned for each patchable function representing a firmware upgrade. The first statement of each function may check its associated flag and determine if patch-code should be executed in place of the current function residing in ROM. If the flag is not set, the code may continue executing normally. If the flag is set, a function identifier may be placed into a global memory location, and an assembly language “jump” instruction may be executed, redirecting program control to a specified location in a volatile Scratch Read Only Memory (SROM) where the corresponding patched code may be stored. If more than one function is patched, the global identifier may be used to determine which patched function to execute. Using an assembly language “jump” instruction to redirect control results in the patched function's returning normally to its calling function once it has completed executing.

Abstract translation: 驻留在ROM中的固件可以升级而不需要重新硅芯片的系统。 可以为表示固件升级的每个可修补功能分配一位标志。 每个功能的第一个语句可以检查其关联的标志，并确定是否应该执行补丁代码来代替驻留在ROM中的当前功能。 如果未设置标志，则代码可能会继续正常执行。 如果标志被设置，则可以将功能标识符放置到全局存储器位置中，并且可以执行汇编语言“跳转”指令，将程序控制重定向到易失性的只读存储器（SROM）中的指定位置，其中相应的 可以存储修补代码。 如果修复了多个功能，则可以使用全局标识符来确定要执行的修补功能。 使用汇编语言“跳转”指令重定向控制结果，修补后的函数在完成执行后正常返回到调用函数。

公开(公告)号：US08990181B2

公开(公告)日：2015-03-24

申请号：US12884154

申请日：2010-09-16

Applicant: Lokesh Johri ,  Sasikala Divakaruni ,  Andrew Bartlett ,  Richard W. Holbrook

Inventor： Lokesh Johri ,  Sasikala Divakaruni ,  Andrew Bartlett ,  Richard W. Holbrook

IPC: G06F17/30

CPC classification number: G06F17/30091 ,  G06F17/30241

Abstract: A method for transferring data between a host device and an external device is described. The external device has FAT32 file system. The method accepts parameters for an incoming data file from the host device. Further, the method allocates memory blocks for the incoming file data on the external device based on the parameters and indexes the allocated memory blocks on a memory index table to create a file footprint. The method reads the memory index table to identify the file footprint and receives the incoming file data from the host device.

Abstract translation: 描述了在主机设备和外部设备之间传送数据的方法。 外部设备具有FAT32文件系统。 该方法接受来自主机设备的传入数据文件的参数。 此外，该方法基于参数为外部设备上的传入文件数据分配内存块，并对存储器索引表上分配的存储块进行索引以创建文件占用。 该方法读取内存索引表以识别文件占用空间，并从主机设备接收传入的文件数据。

公开(公告)号：US08907633B2

公开(公告)日：2014-12-09

申请号：US13173287

申请日：2011-06-30

Applicant: Christopher Fischbach ,  Timothy J. Knowlton ,  James P. McFarland

Inventor： Christopher Fischbach ,  Timothy J. Knowlton ,  James P. McFarland

IPC: H02J7/00 ,  H02J7/04 ,  H02J7/16

CPC classification number: H02J7/0004 ,  H02J7/00 ,  H02J7/0073 ,  H02J7/0091 ,  H02J7/04 ,  H02J7/16 ,  H02J2007/0062

Abstract: An emulation system for charging any arbitrary portable device through a communication port on the portable device. The system includes a receptacle port for communicating with the portable device and a profile database for storing multiple charging profiles. Each charging profile including a set of parameters and at least one exit condition. Further, an emulation module applies a first charging profile to the portable device and monitors the set of parameters associated with the charging profile to identify an associated exit condition. Upon a determination that the exit condition for the first charging profile is met, the emulation module applies a next charging profile to the portable device.

Abstract translation: 一种用于通过便携式设备上的通信端口对任意任意便携式设备进行充电的仿真系统。 该系统包括用于与便携式设备通信的插座端口和用于存储多个充电简档的简档数据库。 每个充电简档包括一组参数和至少一个退出条件。 此外，仿真模块将第一充电简档应用于便携式设备并且监视与充电简档相关联的一组参数以识别相关联的退出条件。 当确定满足第一充电曲线的退出条件时，仿真模块向便携式设备应用下一个充电曲线。

公开(公告)号：US08860378B2

公开(公告)日：2014-10-14

申请号：US13303176

申请日：2011-11-23

Applicant: Srinivas K. Pulijala

Inventor： Srinivas K. Pulijala

IPC: H01M10/44 ,  H01M10/46 ,  H02J7/00

CPC classification number: H02J7/0009 ,  H02J7/0004 ,  H02J7/0036 ,  H02J2007/0062

Abstract: Embodiments of the present disclosure provide a method and system for indicating an attachment and removal for a portable device. The method includes the steps of attaching the portable device to a charging system, delivering current to the portable device from the charging system, the delivered current is limited based on the portable device, replicating the current flowing through the first switch at a second switch, generating a voltage based on the current flowing through the second switch, comparing the voltage with a pre-defined threshold voltage, and indicating at least one of attachment or removal for the portable device based on the comparison.

Abstract translation: 本公开的实施例提供了一种用于指示便携式设备的附接和移除的方法和系统。 该方法包括以下步骤：将便携式设备连接到充电系统，从充电系统向便携式设备传送电流，基于便携式设备限制输送电流，在第二开关处复制流过第一开关的电流， 基于流经所述第二开关的电流产生电压，将所述电压与预定义的阈值电压进行比较，并且基于所述比较来指示所述便携式设备的附接或移除中的至少一个。

公开(公告)号：US08839371B2

公开(公告)日：2014-09-16

申请号：US12868724

申请日：2010-08-26

Applicant: Atish Ghosh ,  Mark Bohm

Inventor： Atish Ghosh ,  Mark Bohm

IPC: G06F21/00 ,  H04L9/08 ,  H04L9/32

CPC classification number: H04L9/0866 ,  G06F21/85 ,  G06F2221/2141 ,  H04L9/3226 ,  H04L2209/80 ,  H04W12/04 ,  H04W12/08

Abstract: A method and system for securing access to a storage device including one or more locked logical sections. The method includes providing an interface device including a first port connected to a computing system and a second port connected to the storage device. Further, the method includes receiving a unique identifier from a wireless device, and deriving a key from the unique identifier. Based on the derived key, the method unlocks a logical section in the storage device. The method may further store access permission rights for the locked logical sections in the interface device and unlock the logical section based on the access permission rights. Moreover, the method may further authenticate the identity of a user of the wireless device for unlocking the storage device.

Abstract translation: 一种用于保护对包括一个或多个锁定逻辑部分的存储设备的访问的方法和系统。 该方法包括提供包括连接到计算系统的第一端口和连接到存储设备的第二端口的接口设备。 此外，该方法包括从无线设备接收唯一标识符，以及从唯一标识符导出密钥。 基于派生密钥，该方法解锁存储设备中的逻辑部分。 该方法还可以存储接口设备中锁定的逻辑部分的访问许可权限，并且基于访问权限权限来解锁逻辑部分。 此外，该方法还可以验证用于解锁存储设备的无线设备的用户的身份。

公开(公告)号：US08696199B2

公开(公告)日：2014-04-15

申请号：US12211673

申请日：2008-09-16

Applicant: Robert St. Pierre ,  Scott C. McLeod

Inventor： Robert St. Pierre ,  Scott C. McLeod

IPC: G01K7/01

CPC classification number: G01K7/01

Abstract: A temperature sensor circuit and system providing accurate digital temperature readings using a local or remote temperature diode. In one set of embodiments a change in diode junction voltage (ΔVBE) proportional to the temperature of the diode is captured and provided to an analog to digital converter (ADC), which may perform required signal conditioning functions on ΔVBE, and provide a digital output corresponding to the temperature of the diode. DC components of errors in the measured temperature that may result from EMI noise modulating the junction voltage (VBE) may be minimized through the use of a front-end sample-and-hold circuit coupled between the diode and the ADC, in combination with a shunt capacitor coupled across the diode junction. The sample-and-hold-circuit may sample VBE at a frequency that provides sufficient settling time for each VBE sample, and provide corresponding stable ΔVBE samples to the ADC at the ADC operating frequency. The ADC may therefore be operated at its preferred sampling frequency rate without incurring reading errors while still averaging out AC components of additional errors induced by sources other than EMI.

Abstract translation: 温度传感器电路和系统使用本地或远程温度二极管提供精确的数字温度读数。 在一组实施例中，与二极管的温度成比例的二极管结电压（＆Dgr; VBE）的变化被捕获并提供给模数转换器（ADC），模数转换器（ADC）可以在＆Dgr; VBE上执行所需的信号调节功能，以及 提供对应于二极管温度的数字输出。 通过使用耦合在二极管和ADC之间的前端采样和保持电路，结合一个或多个电压，可以将结电压（VBE）的EMI噪声调制产生的测量温度误差的直流分量最小化 并联电容耦合在二极管结上。 采样和保持电路可以以为每个VBE采样提供足够的建立时间的频率对VBE进行采样，并以ADC工作频率向ADC提供相应的稳定的＆Dgr; VBE采样。 因此，ADC可以以其优选的采样频率运行，而不会引起读取错误，同时仍然对由除EMI之外的源引起的附加误差的AC分量进行平均化。