公开(公告)号：US20050088916A1

公开(公告)日：2005-04-28

申请号：US10500328

申请日：2002-05-28

申请人： Weiqing Zhu ,  Min Zhu ,  Changhong Wang ,  Feng Pan

发明人： Weiqing Zhu ,  Min Zhu ,  Changhong Wang ,  Feng Pan

IPC分类号： H04B13/02 ,  H04B11/00

CPC分类号： H04B13/02

摘要： The present invention relates to a method and a system of a high code speed low error probability underwater acoustic coherent communication for underwater transferring instruction, data and image. The communication system includes a host machine installed on a mother ship or a main control underwater vehicles A and a guest machine installed on an underwater vehicle B, wherein the host machine comprises an electronic subassembly, a transducer and a receiving line array which is vertically deployed and consists of more than two hydrophones, and the guest machine comprises an electronic subassembly and a transmitting/receiving transducer. The signal processing method of the present invention is based on the joint technology of the space diversity, the self-optimized adaptive decision feedback equalizer and self-optimized adaptive phase tracker so as to overcome the affection of motion of the channel and the vehicles, such that the received signal could be quite close to the transmitted signal, and the bit error probability is low.

摘要翻译： 本发明涉及用于水下传送指令，数据和图像的高码速低误差概率水下声相干通信的方法和系统。 通信系统包括安装在母舰或主控水下航行器A上的主机，以及安装在水下航空器B上的客机，其中主机包括垂直展开的电子组件，换能器和接收线阵列 并且由两个以上的水听器组成，并且客机包括电子组件和发送/接收换能器。 本发明的信号处理方法是基于空间分集的联合技术，自优化的自适应判决反馈均衡器和自优化的自适应相位跟踪器，以克服信道和车辆的运动的影响， 接收到的信号可能非常接近发射信号，并且位错误概率低。

公开(公告)号：US06734718B1

公开(公告)日：2004-05-11

申请号：US10328686

申请日：2002-12-23

申请人： Feng Pan

发明人： Feng Pan

IPC分类号： G06F110

CPC分类号： G11C5/145 ,  G11C16/30 ,  H02M3/073 ,  H02M2001/0032 ,  Y02B70/16

摘要： In a non-volatile memory, charge pumps are used to provide high voltages needed for programming memory cells that have floating gate structures. Charge pumps have a series of voltage multiplier stages in series to boost voltage. These charge pumps must rapidly charge a load to a high voltage and then maintain a voltage with a high degree of stability. Techniques for achieving both of these goals are presented. In one aspect, a charge pump has two operating states, one to charge a load rapidly and a second to maintain a voltage on a charged load with high stability. These states are achieved by changing the current output from a high current during charging to a low current to maintain the voltage. This is done by changing the capacitance used in the individual voltage multiplier stages. In another aspect, two different current levels are produced by changing the voltage used to charge the capacitors of the voltage multiplier stages.

摘要翻译： 在非易失性存储器中，电荷泵用于提供编程具有浮动栅极结构的存储器单元所需的高电压。 电荷泵具有串联的一系列电压倍增器级以提高电压。 这些电荷泵必须快速将负载充电到高电压，然后保持高度稳定的电压。 介绍了实现这两个目标的技术。 在一个方面，电荷泵具有两种操作状态，一种用于快速充电负载，另一种用于以高稳定性来保持充电负载上的电压。 这些状态通过将充电期间的高电流的电流输出改变为低电流来实现，以维持电压。 这是通过改变单个电压倍增器级中使用的电容来实现的。 在另一方面，通过改变用于对电压倍增器级的电容器充电的电压来产生两个不同的电流电平。

公开(公告)号：US06587590B1

公开(公告)日：2003-07-01

申请号：US09402367

申请日：2000-02-22

申请人： Feng Pan

发明人： Feng Pan

IPC分类号： G06K936

CPC分类号： G06F17/147

摘要： A method and system for computing 2-D DCT/IDCT which is easy to implement with VLSI technology to achieve high throughput to meet the requirements of high definition video processing in real time is described. A direct 2-D matrix factorization approach is utilized to compute the 2-D DCT/IDCT. The 8×8 DCT/IDCT is computed through four 4×4 matrix multiplication sub-blocks. Each sub-block is half the size of the original 8×8 size and therefore requires a much lower number of multiplications. Additionally, each sub-block can be implemented independently with localized interconnection so that parallelism can be exploited and a much higher DCT/IDCT throughput can be achieved.

摘要翻译： 描述了一种利用VLSI技术实现的2D-DCT / IDCT计算方法和系统，实现了高吞吐量，实现了高清视频处理的实时性要求。 使用直接的2-D矩阵因式分解方法来计算2-D DCT / IDCT。 通过四个4×4矩阵乘法子块计算8×8 DCT / IDCT。 每个子块的大小是原始8x8尺寸的一半，因此需要较少数量的乘法。 此外，每个子块可以通过局部互连独立实现，从而可以利用并行性，并且可以实现更高的DCT / IDCT吞吐量。

公开(公告)号：US06370065B1

公开(公告)日：2002-04-09

申请号：US09667347

申请日：2000-09-22

申请人： Feng Pan ,  Colin Bill

发明人： Feng Pan ,  Colin Bill

IPC分类号： G11C1604

CPC分类号： G11C16/3445 ,  G11C16/344

摘要： A method for serial sequencing the automatic disturb erase verify (APDEV) function during a multiple sector fast erase mode. The fast erase mode allows a memory device to erase several sectors of memory cells simultaneously. In order to minimize the time required to complete the APDEV and APDE functions, latches store for the address lines of the sector column positions. The APDEV function, therefore, can be performed serially on each of the sectors in the multiple sector group instead of all the sectors in the group simultaneously, thereby decreasing the amount of time required for the APDEV and APDE functions during the fast erase mode.

摘要翻译： 一种在多扇区快速擦除模式下对自动干扰擦除验证（APDEV）功能进行串行排序的方法。 快速擦除模式允许存储器件同时擦除存储器单元的多个扇区。 为了最小化完成APDEV和APDE功能所需的时间，锁存器存储扇区列位置的地址线。 因此，APDEV功能可以在多个扇区组中的每个扇区上而不是组中的所有扇区同时执行，从而减少快速擦除模式期间APDEV和APDE功能所需的时间量。

公开(公告)号：US06359824B1

公开(公告)日：2002-03-19

申请号：US09592474

申请日：2000-06-09

申请人： Colin S. Bill ,  Jonathan Shi-Chang Su ,  Feng Pan

发明人： Colin S. Bill ,  Jonathan Shi-Chang Su ,  Feng Pan

IPC分类号： G11C800

CPC分类号： G11C8/10 ,  G11C8/08

摘要： The present invention discloses a method and system for activating a plurality of wordline decoder circuits to transfer a predetermined high voltage to a plurality of wordlines during a test mode in a memory device. A plurality of wordline voltage supply circuits supply voltage for the wordlines. During operation, when the memory device is placed in a test mode requiring application of the predetermined high voltage to the wordlines, the wordline decoder circuits are activated. In addition, a first predetermined voltage that is approximately zero volts is supplied by the wordline voltage supply circuits to the wordline decoder circuits for a first predetermined amount of time. Once the wordline decoder circuits decode the respective wordlines, the first predetermined voltage is transferred to the respective wordlines. The wordline voltage supply circuits then supply a second predetermined voltage that is transferred to the respective wordlines by the still activated wordline decoder circuits for a second predetermined amount of time. Finally, the wordline voltage supply circuits supply a predetermined high voltage that is transferred to the respective wordlines by the still activated wordline decoder circuits for a third predetermined amount of time.

摘要翻译： 本发明公开了一种用于激活多个字线解码器电路以在存储器件中的测试模式期间将预定高电压传送到多个字线的方法和系统。 多个字线电压电路为字线提供电压。 在操作期间，当存储器件被放置在需要对字线施加预定高电压的测试模式时，字线解码器电路被激活。 此外，大约零伏特的第一预定电压由字线电压供应电路在第一预定时间量内被提供给字线解码器电路。 一旦字线解码器电路解码相应的字线，则第一预定电压被传送到相应的字线。 然后，字线电压供应电路提供第二预定电压，该第二预定电压由静止激活的字线解码器电路传送到相应的字线第二预定时间量。 最后，字线电压供给电路通过静止激活的字线解码器电路提供预定的高电压，该预定的高电压被传送到相应的字线第三预定的时间量。

公开(公告)号：US11894680B2

公开(公告)日：2024-02-06

申请号：US16355574

申请日：2019-03-15

申请人： Feng Pan ,  Jesse T. Holzer ,  Yonghong Chen ,  Arun Veeramany

发明人： Feng Pan ,  Jesse T. Holzer ,  Yonghong Chen ,  Arun Veeramany

IPC分类号： H02J3/00 ,  G06F9/54 ,  H02J13/00 ,  G06N5/01

CPC分类号： H02J3/003 ,  G06F9/546 ,  G06N5/01 ,  H02J3/0075 ,  H02J13/00017 ,  H02J2203/20

摘要： Apparatus and methods are disclosed for solving Mixed Integer Programming (MIP) problems, such as Security Constrained Unit Commitment (SCUC) problems used by power grid authorities to perform day-ahead market clearing. In certain examples, a plurality of threads of a software tool implementing a concurrent optimizer can be executed concurrently and sequentially to generate new solutions to a SCUC problem for an upcoming planning horizon. Data can be shared among the concurrently executing threads, such as intermediate/incumbent solutions and hints regarding the fixing of variables and constraints to reduce the size of the SCUC problem. In some examples, the threads are seeded with historical solutions from prior planning horizons. The software tool can select a best solution from the solutions generated by the threads, and determine dispatch instructions for a device coupled to the power grid for the upcoming planning horizon based at least in part on the selected solution.

公开(公告)号：US20190286993A1

公开(公告)日：2019-09-19

申请号：US16355574

申请日：2019-03-15

申请人： Feng Pan ,  Jesse T. Holzer ,  Yonghong Chen ,  Edward Rothberg ,  Arun Veeramany

发明人： Feng Pan ,  Jesse T. Holzer ,  Yonghong Chen ,  Edward Rothberg ,  Arun Veeramany

IPC分类号： G06N5/00 ,  G06F9/54 ,  H02J3/14

摘要： Apparatus and methods are disclosed for solving Mixed Integer Programming (MIP) problems, such as Security Constrained Unit Commitment (SCUC) problems used by power grid authorities to perform day-ahead market clearing. In certain examples, a plurality of threads of a software tool implementing a concurrent optimizer can be executed concurrently and sequentially to generate new solutions to a SCUC problem for an upcoming planning horizon. Data can be shared among the concurrently executing threads, such as intermediate/incumbent solutions and hints regarding the fixing of variables and constraints to reduce the size of the SCUC problem. In some examples, the threads are seeded with historical solutions from prior planning horizons. The software tool can select a best solution from the solutions generated by the threads, and determine dispatch instructions for a device coupled to the power grid for the upcoming planning horizon based at least in part on the selected solution.

公开(公告)号：US08917765B2

公开(公告)日：2014-12-23

申请号：US12840144

申请日：2010-07-20

申请人： Yang Liu ,  Feng Pan

发明人： Yang Liu ,  Feng Pan

IPC分类号： H04N11/02 ,  H04N19/124 ,  H04N19/127 ,  H04N19/154 ,  H04N19/61 ,  H04N19/156 ,  H04N19/17 ,  H04N19/186

CPC分类号： H04N19/124 ,  H04N19/126 ,  H04N19/127 ,  H04N19/137 ,  H04N19/139 ,  H04N19/154 ,  H04N19/156 ,  H04N19/17 ,  H04N19/176 ,  H04N19/182 ,  H04N19/186 ,  H04N19/61

摘要： A system for encoding a video stream into a processed video signal that includes at least one image, includes a region identification signal generator for detecting a region of interest in the at least one image and generating a region identification signal when the pattern of interest is detected. An encoder section generates the processed video signal based on the operation of a plurality of encoding tools, each having at least one encoder quality parameter. The encoder section adjusts the at least one encoding quality parameter of at least one of the plurality of encoding tools in response to the region identification signal.

摘要翻译： 一种用于将视频流编码成包括至少一个图像的经处理的视频信号的系统包括区域识别信号发生器，用于检测所述至少一个图像中的感兴趣区域，并且当感兴趣的模式被检测时产生区域识别信号 。 编码器部分基于多个编码工具的操作产生处理的视频信号，每个编码工具具有至少一个编码器质量参数。 编码器部分响应于区域识别信号来调整多个编码工具中的至少一个的至少一个编码质量参数。

公开(公告)号：US08913857B2

公开(公告)日：2014-12-16

申请号：US13488334

申请日：2012-06-04

申请人： Chih-Ming Chien ,  Feng Pan

发明人： Chih-Ming Chien ,  Feng Pan

IPC分类号： G02B6/43 ,  G02B6/36

CPC分类号： G02B6/43 ,  G02B6/3608

摘要： An optical backplane assembly (1) includes a backplane (10), a first switch card (21), a second switch card (22) disposed on one side of the first switch card, a plurality of first line cards disposed on the other side of the first switch card, and a first optical assembly (41) including a plurality of first optical channels (411) and a plurality of second optical channels (412) overlapped with the first optical channel. The first optical channels optically interconnecting the first switch card with the first line cards. The second optical channels optically interconnecting the second switch card with the first optical channels.

摘要翻译： 光背板组件（1）包括背板（10），第一开关卡（21），设置在第一开关卡一侧的第二开关卡（22），设置在另一侧的多个第一线卡 以及包括与第一光通道重叠的多个第一光通道（411）和多个第二光通道（412）的第一光学组件（41）。 第一光通道将第一开关卡与第一线卡光学地互连。 第二光通道将第二开关卡与第一光通道光学地互连。

公开(公告)号：US08548049B2

公开(公告)日：2013-10-01

申请号：US11772763

申请日：2007-07-02

申请人： Feng Pan ,  Jingyun Jiao

发明人： Feng Pan ,  Jingyun Jiao

IPC分类号： H04N7/12 ,  H04N7/167

CPC分类号： H04N19/17 ,  H04N19/115 ,  H04N19/14 ,  H04N19/154 ,  H04N19/186

摘要： A system for encoding a video stream into a processed video signal that includes at least one image, includes a pattern detection module for detecting a pattern of interest in the at least one image and identifying a region that contains the pattern of interest when the pattern of interest is detected. An encoder section, generates the processed video signal and wherein, when the pattern of interest is detected, a higher quantization is assigned to the region than to portions of the at least one image outside the region.

摘要翻译： 一种用于将视频流编码成包括至少一个图像的经处理的视频信号的系统，包括：图案检测模块，用于在所述至少一个图像中检测感兴趣的图案，并且当所述图案的图案被识别时，识别包含感兴趣图案的区域; 检测到兴趣。 编码器部分生成经处理的视频信号，并且其中当检测到感兴趣的图案时，对该区域分配比对该区域外的该至少一个图像的部分更高的量化。