公开(公告)号：US20140195716A1

公开(公告)日：2014-07-10

申请号：US13738709

申请日：2013-01-10

Applicant: Avnera Corporation

Inventor： Ole Bentz ,  Robert Mays ,  Bruce Nepple ,  James Anderson

IPC: G06F12/02

CPC classification number: G06F12/0223 ,  G06F12/0638 ,  G06F2212/1012 ,  G06F2212/205

Abstract: A memory address space for each of a plurality of physical memories in a microprocessor-based system is allocated prior to knowing the desired logical size of at least one of the physical memories. At least two of the allocated memory address spaces overlap at least a portion of each other. After the system is fabricated, a pointer value set that corresponds to an address boundary between at least two physical memories of the fabricated system is set during boot time and/or during run time when the size of the physical memories are known. The technique provides a faster time-to-market for microprocessor-based systems by allowing, for example, Application Specific Integrated Circuits (ASICs) comprising microprocessor systems on-chip be manufactured prior to the final firmware and software being fully developed. Additionally, the subject matter disclosed herein permits changes in memory-space allocation for finalized ASIC designs.

Abstract translation: 在知道至少一个物理存储器的期望的逻辑大小之前，分配用于基于微处理器的系统中的多个物理存储器中的每一个的存储器地址空间。 所分配的存储器地址空间中的至少两个与彼此的至少一部分重叠。 在制造系统之后，在引导时间期间和/或在运行时间期间设置物理存储器的大小已知时，设置对应于所制造的系统的至少两个物理存储器之间的地址边界的指针值集合。 该技术通过允许例如在最终固件和软件完全开发之前制造包括芯片上的微处理器系统的专用集成电路（ASIC）来为基于微处理器的系统提供更快的上市时间。 此外，本文公开的主题允许最终ASIC设计的存储空间分配的改变。

公开(公告)号：US11133785B2

公开(公告)日：2021-09-28

申请号：US16648621

申请日：2018-09-20

Applicant: Avnera Corporation

Inventor： Wai Laing Lee

IPC: H03F3/217 ,  H03F3/187 ,  H03M1/46 ,  H03M1/50 ,  H03M1/82 ,  H04R3/00 ,  H03F3/45 ,  H03M3/00

Abstract: An amplifier for headphones including a current digital-to-analog converter (DAC) configured to output a current based on a digital audio input signal, an output electrically connected to a speaker and configured to output an output signal to the speaker, and a pulse width modulation (PWM) loop configured to receive an error signal, the error signal based on a difference between the current from the current DAC and a current of the output signal, and generate the output signal based on the error signal. The PWM loop includes an analog-to-digital converter (ADC) configured to receive an analog signal based on the current from the current DAC and output a digital signal representing the analog signal, and an encoder configured to receive the digital signal and output a pulse having a width based on the analog signal.

公开(公告)号：US11102580B2

公开(公告)日：2021-08-24

申请号：US15795721

申请日：2017-10-27

Applicant: AVNERA CORPORATION

Inventor： Manpreet S. Khaira ,  David McNeill ,  Eric Sorensen ,  Sydney Newton

IPC: H04R5/04 ,  H04R1/10 ,  B23P19/04 ,  H04R5/033

Abstract: The disclosure includes a headset including one or more earphones and a connector configured to couple data and charge between the headset and a user equipment (UE). The headset also includes a charge node. The charge node includes a charge port for receiving UE charge from a charge source. The charge node also includes a downstream port for coupling audio data toward the earphones. The charge node further includes an upstream port for coupling the audio data toward the earphones via the downstream port and coupling UE charge from the charge port toward the UE via the connector.

公开(公告)号：US10997960B2

公开(公告)日：2021-05-04

申请号：US16545917

申请日：2019-08-20

Applicant: Avnera Corporation

Inventor： Amit Kumar ,  Thomas Irrgang ,  Xudong Zhao

IPC: H04R3/00 ,  G10K11/178 ,  H04R1/10

Abstract: An audio processing system can include an Analog to Digital Converter structured to receive an analog input signal and convert the analog input signal to a digital input signal, a first processor coupled with the Analog to Digital Converter, the first processor including at least one programmable bi-quadratic filter chain structured to receive the digital input signal from the Analog to Digital Converter and perform audio processing on the received digital input signal at a first clock rate, and a second processor coupled with the first processor and the Analog to Digital Converter and structured to receive the digital input signal from the Analog to Digital Converter and perform audio processing on the received digital input signal at a second clock rate that is different from the first clock rate.

公开(公告)号：US10950214B2

公开(公告)日：2021-03-16

申请号：US16721529

申请日：2019-12-19

Applicant: Avnera Corporation

Inventor： Amit Kumar ,  Eric Sorensen

IPC: G10K11/178

Abstract: A system including an automatic noise canceling (ANC) headphone and a processor. The ANC headphone has a microphone configured to generate a microphone signal and at least two non-zero ANC gain levels. The processor is configured to receive the microphone signal, determine a characteristic of the microphone signal, and identify a revised ANC level from the ANC gain levels based on a comparison of the characteristic to at least one threshold. Methods are also disclosed.

公开(公告)号：US10667056B2

公开(公告)日：2020-05-26

申请号：US15599331

申请日：2017-05-18

Applicant: Avnera Corporation

Inventor： Chris O'Connor ,  Xudong Zhao

IPC: H04R3/12 ,  H04R1/10 ,  H04R29/00 ,  H04R5/04 ,  G10L19/012

Abstract: A low power, digital audio interface includes support for variable length coding depending on content of the audio data sent from the interface. A particularized coding system is implemented that uses techniques of silence detection, dynamic scaling, and periodic encoding to reduce sent data to a minimum. Other techniques include variable packet scaling based on an audio sample rate. Differential signaling techniques are also used. The digital audio interface may be used in a headphone interface to drive digital headphones. A detector in the interface may detect whether digital or analog headphones are coupled to a headphone jack and drive the headphone jack accordingly.

公开(公告)号：US20200084541A1

公开(公告)日：2020-03-12

申请号：US16545917

申请日：2019-08-20

Applicant: Avnera Corporation

Inventor： Amit Kumar ,  Thomas Irrgang ,  Xudong Zhao

IPC: H04R3/00 ,  G10K11/178 ,  H04R1/10

Abstract: An audio processing system can include an Analog to Digital Converter structured to receive an analog input signal and convert the analog input signal to a digital input signal, a first processor coupled with the Analog to Digital Converter, the first processor including at least one programmable bi-quadratic filter chain structured to receive the digital input signal from the Analog to Digital Converter and perform audio processing on the received digital input signal at a first clock rate, and a second processor coupled with the first processor and the Analog to Digital Converter and structured to receive the digital input signal from the Analog to Digital Converter and perform audio processing on the received digital input signal at a second clock rate that is different from the first clock rate.

公开(公告)号：US10547944B2

公开(公告)日：2020-01-28

申请号：US16195340

申请日：2018-11-19

Applicant: Avnera Corporation

Inventor： Theodore Hetke ,  John Speth

IPC: H04R3/12 ,  H04W4/80

Abstract: A method for re-forming a complete ring network of a plurality of Bluetooth® speakers, after a speaker has left an original ring of speakers, the method including detecting that the speaker has left the ring, and reestablishing the ring without the departed speaker. The detection may include a timeout detection if the speaker left without notice, or include receiving notice that the speaker intends to leave.

公开(公告)号：US10540954B2

公开(公告)日：2020-01-21

申请号：US16101192

申请日：2018-08-10

Applicant: Avnera Corporation

Inventor： Amit Kumar ,  Thomas Irrgang ,  Shankar Rathoud ,  Eric Sorensen

IPC: G10K11/178 ,  H04R29/00 ,  H04R1/10

Abstract: A fixture for calibrating an active noise canceling (ANC) earphone, the calibration fixture including an ear model and an acoustic path. The ear model is configured to support an ANC earphone and includes an ear canal extending from an outer end of the ear canal to an inner end of the ear canal. The acoustic path is external to the ear canal and extends from, at a first end of the acoustic path, the inner end of the ear canal of the ear model to an opposite, second end of the acoustic path. The acoustic path is configured to transmit a mechanical sound wave received from the inner end of the ear canal to a region external to the ear model and adjacent the outer end of the ear canal.

公开(公告)号：US10474420B2

公开(公告)日：2019-11-12

申请号：US16159333

申请日：2018-10-12

Applicant: Avnera Corporation

Inventor： Manpreet S. Khaira ,  Shawn O'Connor ,  Frank Prestrelski ,  Patrick Allen Quinn ,  Richard Andrew Sorensen ,  Eric Sorensen

IPC: G06F3/16 ,  G06F3/01 ,  G06F3/03 ,  G06F3/041 ,  G06F3/0346

Abstract: A speaker system includes a case, an audio input, speakers, an accelerometer, and a computer processor. The audio input is structured to receive a program audio signal from an audio device. The speakers are configured to play an audio output based on the program audio signal, the audio output causing a vibration of the case. The accelerometer is configured to detect the vibration of the case as well as a user tap on the case. The computer processor is configured to identify a user gesture that includes the tap on the case, to identify the tap apart from the case vibration by processing the detected vibration of the case and the detected user tap on the case based on information from the program audio signal to separate the detected user tap from the detected vibration, and to commence a particular function associated with the user gesture.